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CAT34TS00 PDF даташит

Спецификация CAT34TS00 изготовлена ​​​​«ON Semiconductor» и имеет функцию, называемую «1.8V Digital Temperature Sensor».

Детали детали

Номер произв CAT34TS00
Описание 1.8V Digital Temperature Sensor
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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CAT34TS00 Даташит, Описание, Даташиты
CAT34TS00
1.8 V Digital Temperature
Sensor
Description
CAT34TS00 is a low-voltage digital temperature sensor, which
implements the JEDEC JC42.4 specification. CAT34TS00 measures
temperature every 100 ms over a range of −20°C to +125°C, with a
resolution of 12 bits.
The host communicates with the device via the serial I2C / SMBus
Interface, at either 100 kHz or 400 kHz. Temperature readings can be
retrieved via serial interface. Internally, they are compared to high,
low and critical trigger limits stored in device registers. Over or under
limit conditions can be signaled on the open−drain EVENT pin. These
limits, as well as other settings, can be configured via serial interface.
Features
JEDEC JC42.4 Compliant Temperature Sensor
Supply Range: 1.7 V to 1.9 V
Temperature Range: −20°C to +125°C
I2C / SMBus Interface
Temperature Sampling Rate: 100 ms max
Temperature Reading Accuracy:
±0.5°C typ for Active Range (+75°C to +95°C)
Schmitt Triggers and Noise Suppression Filters on SCL and SDA
Inputs
2 x 3 x 0.75 mm TDFN Package
These Devices are Pb−Free and are RoHS Compliant
Typical Applications
Solid State Drives
Graphics Cards
Portable Devices
Process Control Equipment
VCC
SCL
A2, A1, A0
SDA
CAT34TS00
EVENT
VSS
Figure 1. Functional Symbol
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TDFN−8
VP2 SUFFIX
CASE 511AK
PIN CONFIGURATION
A0 1
A1
(Top View)
A2
VSS
VCC
EVENT
SCL
SDA
TDFN (VP2)
For the location of Pin 1, please consult the
corresponding package drawing.
MARKING DIAGRAM
TDFN−8
OTA
ALL
YM
G
OTA = Specific Device Code
A = Assembly Location Code
LL = Assembly Lot Number (Last Two Digits)
Y = Production Year (Last Digit)
M = Production Month (1 − 9, O, N, D)
G = Pb−Free Package
= Pin 1 Indicator
PIN FUNCTIONS
Pin Name
Function
A0, A1, A2
VSS
SDA
SCL
Device Address Inputs
Ground
Serial Data Input / Output
Serial Clock Input
EVENT
Open−drain Event Output
VCC
DAP
Ground
Backside Exposed DAP at VSS
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 0
1
Publication Order Number:
CAT34TS00/D









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CAT34TS00 Даташит, Описание, Даташиты
CAT34TS00
Table 1. ABSOLUTE MAXIMUM RATINGS (Notes 1 and 2)
Parameter
Rating
Unit
Voltage on any pin (except A0) with respect to Ground (Note 3)
Voltage on pin A0 with respect to Ground
Operating Temperature
−0.5 to +6.5
−0.5 to +10.5
−45 to +130
V
V
°C
Storage Temperature Range
−65 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
2. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
3. The DC input voltage on any pin should not be lower than −0.5 V or higher than VCC + 0.5 V. SCL and SDA inputs can be raised to the
maximum limit, irrespective of VCC. During transitions, the voltage on any pin may undershoot to no less than −1.5 V or overshoot to no more
than VCC + 1.5 V, for periods of less than 20 ns.
Table 2. TEMPERATURE CHARACTERISTICS
Parameter
Conditions
Max Unit
Temperature Reading Error
ADC Resolution
+75°C TA +95°C, active range
+40°C TA +125°C, monitor range
−20°C TA +125°C, sensing range
±1.0 °C
±2.0 °C
±3.0 °C
12 Bits
Temperature Resolution
0.0625
°C
Conversion Time
100 ms
Thermal Resistance (Note 4) qJA
Junction−to−Ambient (Still Air)
92 °C/W
4. Power Dissipation is defined as PJ = (TJ − TA)/qJA, where TJ is the junction temperature and TA is the ambient temperature. The thermal
resistance value refers to the case of a package being used on a standard 2−layer PCB.
Table 3. D.C. OPERATING CHARACTERISTICS (VCC = 1.7 V to 1.9 V, TA = −20°C to +125°C, unless otherwise specified)
Symbol
Parameter
Test Conditions/Comments Min Max Unit
ICC Supply Current
TS active, Bus idle
500 mA
ISHDN
Standby Current
TS shut−down; Bus idle
5 mA
ILKG I/O Pin Leakage Current
Pin at GND or VCC
2 mA
VIL Input Low Voltage
−0.5
0.3 x VCC
V
VIH Input High Voltage
0.7 x VCC
VCC + 0.5
V
VOL Output Low Voltage
IOL = 1 mA
0.2 V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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CAT34TS00 Даташит, Описание, Даташиты
CAT34TS00
Table 4. A.C. CHARACTERISTICS (VCC = 1.7 V to 1.9 V, TA = −20°C to +125°C)
100 kHz
400 kHz
Symbol
Parameter
Min Max Min Max Units
FSCL (Note 5)
Clock Frequency
10 100 10 400 kHz
tHIGH
High Period of SCL Clock
4 0.6 ms
tLOW
Low Period of SCL Clock
4.7 1.3 ms
tTIMEOUT (Note 6) SMBus SCL Clock Low Timeout
25 35 25 35 ms
tR (Note 7)
SDA and SCL Rise Time
1000
300 ns
tF (Note 7)
SDA and SCL Fall Time
300 300 ns
tSU:DAT
Input Data Setup Time
250 100 ns
tSU:STA
START Condition Setup Time
4.7 0.6 ms
tHD:STA
START Condition Hold Time
4 0.6 ms
tSU:STO
STOP Condition Setup Time
4 0.6 ms
tBUF Bus Free Time Between STOP and START
4.7
1.3 ms
tHD:DAT
Input Data Hold Time
0 0 ns
tDH (Note 7)
Output Data Hold Time
120 3450 120
900 ns
Ti (Note 7)
Noise Pulse Filtered at SCL and SDA Inputs
50 50 ns
tPU (Note 8)
Power-Up Delay to Valid Temperature Recording
100
100 ms
5. Timing reference points are set at 30%, respectively 70% of VCC, as illustrated in Figure 5. Bus loading must be such as to allow meeting
the VIL and VOL as well as all other timing requirements. The minimum clock frequency of 10 kHz is an SMBus recommendation; the minimum
operating clock frequency is limited only by the SMBus time−out. The device also meets the Fast and Standard I2C specifications, except
that Ti and tDH are shorter.
6. For the CAT34TS00, the interface will reset itself and will release the SDA line if the SCL line stays low beyond the tTIMEOUT limit. The time−out
count takes place when SCL is low in the time interval between START and STOP.
7. In a “Wired−OR” system (such as I2C or SMBus), SDA rise time is determined by bus loading. Since each bus pull−down device must be
able to sink the (external) bus pull−up current (in order to meet the VIL and/or VOL limits), it follows that SDA fall time is inherently faster than
SDA rise time. SDA rise time can exceed the standard recommended tR limit, as long as it does not exceed tLOW − tDH − tSU:DAT, where tLOW
and tDH are actual values (rather than spec limits). A shorter tDH leaves more room for a longer SDA tR, allowing for a more capacitive bus
or a larger bus pull−up resistor.
8. The first valid temperature recording can be expected after tPU at nominal supply voltage.
Table 5. PIN CAPACITANCE (TA = 25°C, VCC = 1.9 V, f = 400 kHz)
Symbol
Parameter
Test Conditions/Comments Min Max Unit
CIN SDA, EVENT Pin Capacitance
Input Capacitance (other pins)
VIN = 0
VIN = 0
8 pF
6 pF
Table 6. INPUT IMPEDANCE
Symbol
Parameter
ZEIL
ZEIH
Input Impedance for A0, A1, A2 Pins
Input Impedance for A0, A1, A2 Pins
Test Conditions
VIN < 0.3 * VCC
VIN > 0.7 * VCC
Min Max Unit
30 kW
800 kW
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