HD74ALVC2G126 PDF даташит
Спецификация HD74ALVC2G126 изготовлена «Renesas» и имеет функцию, называемую «Dual Bus Buffer». |
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Детали детали
Номер произв | HD74ALVC2G126 |
Описание | Dual Bus Buffer |
Производители | Renesas |
логотип |
13 Pages
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HD74ALVC2G126
Dual Bus Buffer with 3-state Output
REJ03D0172–0200Z
(Previous ADE-205-622A (Z))
Rev.2.00
Dec.18.2003
Description
The HD74ALVC2G126 has dual bus buffer with 3-state output in an 8 pin package. Output is disabled
when the associated output enable (OE) input is low. To ensure the high impedance state during power up
or power down, OE should be connected to GND through a pull-down resistor; the minimum value of the
resistor is determined by the current souring capability of the driver. Low voltage and high-speed operation
is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
• The basic gate function is lined up as Renesas uni logic series.
• Supplied on emboss taping for high-speed automatic mounting.
• Supply voltage range : 1.2 to 3.6 V
Operating temperature range: −40 to +85°C
• All inputs VIH (Max.) = 3.6 V (@VCC = 0 V to 3.6 V)
All outputs VO (Max.) = 3.6 V (@VCC = 0 V)
• Output current
±2 mA (@VCC = 1.2 V)
±4 mA (@VCC = 1.4 V to 1.6 V)
±6 mA (@VCC = 1.65 V to 1.95 V)
±18 mA (@VCC = 2.3 V to 2.7 V)
±24 mA (@VCC = 3.0 V to 3.6 V)
• Ordering Information
Part Name
Package Type
Package Code Package
Abbreviation
HD74ALVC2G126USE SSOP-8 pin
TTP-8DBV
US
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Rev.2.00, Dec.18.2003, page 1 of 12
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HD74ALVC2G126
Outline and Article Indication
• HD74ALVC2G126
Index band
Lot No.
SSOP-8
Function Table
Inputs
OE
H
H
L
H: High level
L: Low level
X: Immaterial
Z: High impedance
A
H
L
X
YMW
A26
Y : Year code
(the last digit of year)
M : Month code
W : Week code
Marking
Output Y
H
L
Z
Rev.2.00, Dec.18.2003, page 2 of 12
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HD74ALVC2G126
Pin Arrangement
OE1 1
A1 2
Y2 3
GND 4
8 VCC
7 OE2
6 Y1
5 A2
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit Conditions
Supply voltage range
Input voltage range *1
Output voltage range *1, 2
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
VCC
VI
VO
IIK
IOK
IO
ICC or IGND
−0.5 to 4.6
−0.5 to 4.6
−0.5 to VCC+0.5
−0.5 to 4.6
−50
±50
±50
±100
V
V
V Output : H or L or Z
VCC : OFF
mA VI < 0
mA VO < 0 or VO > VCC
mA VO = 0 to VCC
mA
Maximum power dissipation
at Ta = 25°C (in still air) *3
PT
200
mW
Storage temperature
Tstg
−65 to 150
°C
Notes:
The absolute maximum ratings are values, which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.2.00, Dec.18.2003, page 3 of 12
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Номер в каталоге | Описание | Производители |
HD74ALVC2G125 | Dual Bus Buffer | Renesas |
HD74ALVC2G126 | Dual Bus Buffer | Renesas |
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