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PDF NCP1207B Data sheet ( Hoja de datos )
| Número de pieza | NCP1207B | |
| Descripción | PWM Current-Mode Controller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NCP1207A, NCP1207B
PWM Current- Mode
Controller for Free Running
Quasi--Resonant Operation
The NCP1207A/B combines a true current mode modulator and a
demagnetization detector to ensure full borderline/critical Conduction
Mode in any load/line conditions and minimum drain voltage switching
(Quasi--Resonant operation). Due to its inherent skip cycle capability,
the controller enters burst mode as soon as the power demand falls
below a predetermined level. As this happens at low peak current, no
audible noise can be heard. For the NCP1207A, an internal 8.0 ms timer
prevents the free--run frequency to exceed 125 kHz (therefore below the
150 kHz CISPR--22 EMI starting limit), while the skip adjustment
capability lets the user select the frequency at which the burst foldback
takes place. For the NCP1207B, the internal timer duration is reduced to
4.5 ms to allow operation at higher frequencies (up to 200 kHz).
The Dynamic Self--Supply (DSS) drastically simplifies the
transformer design in avoiding the use of an auxiliary winding to
supply the NCP1207A/B. This feature is particularly useful in
applications where the output voltage varies during operation (e.g.
battery chargers). Due to its high--voltage technology, the IC is
directly connected to the high--voltage DC rail. As a result, the
short--circuit trip point is not dependent upon any VCC auxiliary level.
The transformer core reset detection is done through an auxiliary
winding which, brought via a dedicated pin, also enables fast
Overvoltage Protection (OVP). Once an OVP has been detected, the
IC permanently latches off.
Finally, the continuous feedback signal monitoring implemented
with an overcurrent fault protection circuitry (OCP) makes the final
design rugged and reliable.
Free--Running Borderline/Critical Mode Quasi--Resonant Operation
Current--Mode with Adjustable Skip--Cycle Capability
No Auxiliary Winding VCC Operation
Auto--Recovery Overcurrent Protection
Latching Overvoltage Protection
External Latch Triggering, e.g. Via Overtemperature Signal
500 mA Peak Current Source/Sink Capability
Undervoltage Lockout for VCC Below 10 V
Internal 1.0 ms Soft--Start
Internal 8.0 ms Minimum TOFF for NCP1207A,
4.5 ms Minimum TOFF for NCP1207B
Adjustable Skip Level
Internal Temperature Shutdown
Direct Optocoupler Connection
SPICE Models Available for TRANsient Analysis
These are Pb--Free and Halide--Free Devices
Typical Applications
AC/DC Adapters for Notebooks, etc.
Offline Battery Chargers
Consumer Electronics (DVD Players, Set--Top Boxes, TVs, etc.)
Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
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8
1
8
1
SOIC--8
D SUFFIX
CASE 751
SOIC--7
D SUFFIX
CASE 751U
MARKING
DIAGRAM
8
1207A
ALYW
G
1
8
1207B
ALYW
G
1
8
8
1
PDIP--8
P SUFFIX
CASE 626
1207AP
AWL
YYWWG
1
1207A/B/AP = Device Code
A = Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW
= Work Week
G or G
= Pb--Free Package
PIN CONNECTIONS
Dmg 1
FB 2
CS 3
GND 4
8 HV
7 NC
6 VCC
5 Drv
ORDERING INFORMATION
Device
NCP1207ADR2G
Package
SOIC--8
(Pb--Free)
Shipping†
2500/Tape & Reel
NCP1207APG
PDIP--8
(Pb--Free)
50 Units / Rail
NCP1207BDR2G SOIC--7 2500/Tape & Reel
(Pb--Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2010
December, 2010 -- Rev. 11
1
Publication Order Number:
NCP1207A/D
1 page  
NCP1207A, NCP1207B
1.6
1.4
1.2
1.0
0.8
0.6
0.4
--50
--25
0
25 50 75 100 125
TEMPERATURE (C)
Figure 3. Internal IC Consumption (No Output
Load) versus Temperature
2.3
2.1
1.9
1.7
1.5
1.3
1.1
--50
--25
0
25 50 75 100 125
TEMPERATURE (C)
Figure 4. Internal IC Consumption (1.0 nF
Output Load) versus Temperature
12.9 10.8
12.4
11.9
11.4
10.9
10.4
--50
--25
0
25 50 75 100 125
TEMPERATURE (C)
Figure 5. VCC Increasing Level at which the
Current Source Turns--Off versus Temperature
10.3
9.8
9.3
8.8
--50
--25
0
25 50 75 100 125
TEMPERATURE (C)
Figure 6. VCC Decreasing Level at which the
Current Source Turns--On versus Temperature
12
11
10
9
8
7
6
5
4
3
2
--50 --25
0
25 50 75 100 125
TEMPERATURE (C)
Figure 7. Internal Startup Current Source at
VCC = 10 V versus Temperature
40
35
30
25 ROH
20
15
10
ROL
5
0
--50 --25
0
25 50 75 100 125
TEMPERATURE (C)
Figure 8. Source and Sink Resistance versus
Temperature
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5
5 Page 
NCP1207A, NCP1207B
SAMPLING HERE
8.0
6.0
4.0
2.0
4.5 ms
0
Figure 20. A voltage sample is taken 4.5 ms after
the turn--off sequence
When an OVP condition has been detected, the
NCP1207A/B enters a latchoff phase and stops all switching
operations. The controller stays fully latched in this position
and the DSS is still active, keeping the VCC between 5.3
V/12 V as in normal operations. This state lasts until the VCC
is cycled down 4 V, e.g. when the user unplugs the power
supply from the mains outlet.
By default, the OVP comparator is biased to a 5.0 V
reference level and pin1 is routed via a divide by 1.44
network. As a result, when Vpin 1 reaches 7.2 V, the OVP
comparator is triggered. The threshold can thus be adjusted
by either modifying the power winding to auxiliary winding
turn ratios to match this 7.2 V level, or insert a resistor from
Pin 1 to ground to cope with your design requirement.
Latching Off the NCP1207A/B
In certain cases, it can be very convenient to externally
shut down permanently the NCP1207A/B via a dedicated
signal, e.g. coming from a temperature sensor. The reset
occurs when the user unplugs the power supply from the
mains outlet. To trigger the latchoff, a CTN (Figure 21) or
a simple NPN transistor (Figure 22) can do the work.
CTN
NCP1207A/B
18
27
36
45
Aux
Figure 21. A simple CTN triggers the latchoff as
soon as the temperature exceeds a given setpoint
ON/OFF
NCP1207A/B Aux
18
27
36
45
Figure 22. A simple transistor arrangement allows
to trigger the latchoff by an external signal
Shutting Off the NCP1207A/B
Shutdown can easily be implemented through a simple
NPN bipolar transistor as depicted by Figure 23. When OFF,
Q1 is transparent to the operation. When forward biased, the
transistor pulls the FB pin to ground (VCE(sat) 200 mV) and
permanently disables the IC. A small time constant on the
transistor base will avoid false triggering (Figure 23).
NCP1207A/B
ON/OFF
10 k
3
Q1
2
10 nF
1
2
13
4
8
7
6
5
Figure 23. A simple bipolar transistor totally
disables the IC
Power Dissipation
The NCP1207A/B is directly supplied from the DC rail
through the internal DSS circuitry. The DSS being an
auto--adaptive circuit (e.g. the ON/OFF duty--cycle adjusts
itself depending on the current demand), the current flowing
through the DSS is therefore the direct image of the
NCP1207A/B current consumption. The total power
dissipation can be evaluated using:
(VHVDC − 11 V) ⋅ ICC2. If we operate the device on a 250
Vac rail, the maximum rectified voltage can go up to 350
Vdc. As a result, the worse case dissipation occurs at the
maximum switching frequency and the highest line. The
dissipation is actually given by the internal consumption of
the NCP1207A/B when driving the selected MOSFET. The
best method to evaluate this total consumption is probably
to run the final circuit from a 50 Vdc source applied to pin 8
and measure the average current flowing into this pin.
Suppose that we find 2.0 mA, meaning that the DSS
duty--cycle will be 2.0/7.0 = 28.6%.
From the 350 Vdc rail, the part will dissipate:
350 V ⋅ 2.0 mA = 700 mW (however this 2.0 mA number
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11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet NCP1207B.PDF ] | |
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