NP84N06DLD Datasheet PDF - Renesas
| Part Number | NP84N06DLD | |
| Description | N-CHANNEL POWER MOS FET | |
| Manufacturers | Renesas | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP84N06CLD, NP84N06DLD, NP84N06ELD
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
This product is N-Channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
• Channel temperature 175 degree rated
• Super low on-state resistance
RDS(on)1 = 6.5 mΩ MAX. (VGS = 10 V, ID = 42 A)
RDS(on)2 = 9.5 mΩ MAX. (VGS = 5 V, ID = 35 A)
• Built-in gate protection diode
ORDERING INFORMATION
PART NUMBER
PACKAGE
NP84N06CLD
TO-220AB
NP84N06DLD
TO-262
NP84N06ELD
TO-263
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0)
VDSS
60
Gate to Source Voltage (VDS = 0)
VGSS
±20
Drain Current (DC) Note1
ID(DC)
±84
Drain Current (Pulse) Note2
ID(pulse)
±280
Total Power Dissipation (TA = 25°C)
PT1
1.8
Total Power Dissipation (TC = 25°C)
PT2
185
Channel Temperature
Tch 175
Storage Temperature
Tstg -55 to +175
Single Avalanche Current Note3
IAS Figure4
Single Avalanche Energy Note3
EAS Figure4
Repetitive Avalanche Current Note4
IAR
70
Repetitive Avalanche Energy Note4
EAR
490
V
V
A
A
W
W
°C
°C
A
mJ
A
mJ
Notes 1.
2.
3.
4.
Package Limit = ± 75 A
PW ≤ 10 µs, Duty cycle ≤ 1 %
Starting Tch = 25°C, RG = 25 Ω , VGS = 20 V→0 V
Tch ≤ 175°C, RG = 25 Ω , VGS = 20 V→0 V, Duty cycle ≤ 3%
THERMAL RESISTANCE
Channel to Case
Channel to Ambient
Rth(ch-C)
Rth(ch-A)
0.81
83.3
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13464EJ3V0DS00 (3rd edition)
Date Published February 1999 NS CP(K)
Printed in Japan
©
1998
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NP84N06CLD, NP84N06DLD, NP84N06ELD
Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
18
16
14
12
10 VGS = 4 V
8
6 VGS = 10 V
4
2
0 ID = 25 A
- 50 0 50 100 150
Tch - Channel Temperature - ˚C
Figure13. SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
Pulsed
100
VGS = 10 V
10
VGS = 0 V
1
0.1
0 0.5 1.0 1.5
VSD - Source to Drain Voltage - V
Figure14. CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
100 000
VGS = 0 V
f = 1 MHz
Figure15. SWITCHING CHARACTERISTICS
10 000
10 000
Ciss
1 000
Coss
Crss
100
0.1
1 10
VDS - Drain to Source Voltage - V
100
1 000
100
10
1
tr
tf
td(off)
td(on)
10 100
ID - Drain Current - A
1 000
Figure16. REVERSE RECOVERY TIME vs.
DRAIN CURRENT
di/dt = 100 A/µs
VGS = 0 V
100
10
1
0.1 1.0 10 100
IF - Drain Current - A
Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS
80 8
VGS
60 VDD = 48 V
30 V
12 V
40
6
4
20 2
VDS
0 50 100 150 200
QG - Gate Charge - nC
Data Sheet D13464EJ3V0DS00
5
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