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PDF HD74HC164 Data sheet ( Hoja de datos )
| Número de pieza | HD74HC164 | |
| Descripción | 8-bit Parallel-out Shift Register | |
| Fabricantes | Renesas | |
| Logotipo |  |
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HD74HC164
8-bit Parallel-out Shift Register
REJ03D0580-0400
Rev.4.00
Mar 25, 2009
Description
This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A
& B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and
resets the first flip-flop to the low level at the next clock pulse. A high level on the input enables the other input which
will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or
low, but only information meeting the setup and hold time requirements will be entered. Data is serially shifted in and
out of the 8-bit register during the positive going transition of the clock pulse. Clear is independent of the clock and
accomplished by a low level at the clear input.
Features
• High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
HD74HC164P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
HD74HC164FPEL
SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
HD74HC164RPEL
SOP-14 pin (JEDEC)
PRSP0014DE-A
(FP-14DNV)
Note: Please consult the sales office for the above package availability.
Package
Abbreviation
P
Taping Abbreviation
(Quantity)
—
FP EL (2,000 pcs/reel)
RP EL (2,500 pcs/reel)
Function Table
Inputs
Outputs
Clear
Clock
A
B QA QB ·········
L X X X L L ·········
H X X QAo QBo ·········
H L X L QAn ·········
H X L L QAn ·········
H H H H QAn ·········
QAo to QHo = Outputs remain unchanged.
QAn to QGn = Data shifted from the previous stage on a positive edge at the clock input.
H : High level
L : Low level
X : Irrelevant
QH
L
QHo
QGn
QGn
QGn
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 1 of 7
1 page  
HD74HC164
Test Circuit
Measurement point
CL*
Note: CL includes the probe and fig capacitance.
Waveforms
Clear
Clock
Serial A, B
Output QA
(Note 3)
tf tr
90%
50%
10% 10%
tW (Clear)
90%
50%
trem
tf tr
90%
10%
90%
50%
50%
10%
tW (Clock)
tr th
10%
90%
50%
50%
tPHL
tsu tPLH
tW (Clock)
50%
50%
tsu
90%
50%
10%
tf
th
50%
tPHL
50%
tTHL
50%
tTLH
50%
VCC
0V
VCC
0V
VCC
0V
VOH
VOL
Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
2. The output are measured one at a time with one transition per measurement.
3. See function table for QB to QH outputs.
REJ03D0580-0400 Rev.4.00 Mar 25, 2009
Page 5 of 7
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HD74HC164.PDF ] | |
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