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HD74HC78 PDF даташит

Спецификация HD74HC78 изготовлена ​​​​«Renesas» и имеет функцию, называемую «Dual J-K Flip-Flops».

Детали детали

Номер произв HD74HC78
Описание Dual J-K Flip-Flops
Производители Renesas
логотип Renesas логотип 

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HD74HC78 Даташит, Описание, Даташиты
HD74HC78
Dual J-K Flip-Flops
(with Preset, Common Clear and Common Clock)
REJ03D0553-0200
(Previous ADE-205-425)
Rev.2.00
Oct 06, 2005
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. Each
flip-flop has independent J, K, and preset inputs and Q and Q outputs. Two flip-flops are controlled by a common clear
and a common clock. Preset and clear are independent of the clock and accomplished by a low logic level on the
corresponding input.
Features
High Speed Operation: tpd (Clock to Q) = 20 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC78FPEL SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
HD74HC78RPEL SOP-14 pin (JEDEC)
PRSP0014DE-A
(FP-14DNV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Function Table
Inputs
Outputs
Preset
Clear
Clock
J
K
Q
Q
LHX XXH L
HLXXXLH
L L X X X H*1 H*1
HH
LL
No change
HH
LHLH
HH
HLHL
HH
HH
Toggle
HH L XX
No change
HHH X X
No change
HH
XX
No change
H : High level
L : Low level
X : Irrelevant
Note: 1. Q and Q will remain High as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset and
Clear go High simultaneously.
Rev.2.00, Oct 06, 2005 page 1 of 6









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HD74HC78 Даташит, Описание, Даташиты
HD74HC78
Pin Arrangement
Logic Diagram (1/2)
CK 1
1PR 2
1J 3
VCC 4
CLR 5
2PR 6
2K 7
K CK J
CLR PR
QQ
K CK J
CLR PR
QQ
(Top view)
14 1K
13 1Q
12 1Q
11 GND
10 2J
9 2Q
8 2Q
To Other FF
PR
CLR
J
K
#
CK
CK # CK
#
CK
CK CK
CK
CK CK
#
CK
#
CK
CK CK
To Other FF
Q
Q
Rev.2.00, Oct 06, 2005 page 2 of 6









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HD74HC78 Даташит, Описание, Даташиты
HD74HC78
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
VCC, GND current
Power dissipation
Storage temperature
VCC
Vin, Vout
IIK, IOK
IO
ICC or IGND
PT
Tstg
–0.5 to 7.0
–0.5 to VCC +0.5
±20
±25
±50
500
–65 to +150
V
V
mA
mA
mA
mW
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Symbol
Ratings
Supply voltage
VCC 2 to 6
Input / Output voltage
Operating temperature
VIN, VOUT
Ta
0 to VCC
–40 to 85
Input rise / fall time*1
0 to 1000
tr, tf 0 to 500
0 to 400
Note: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Unit
V
V
°C
ns
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Electrical Characteristics
Item
Input voltage
Output voltage
Input current
Quiescent supply
current
Symbol
VIH
VIL
VOH
VOL
Iin
ICC
VCC (V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
Ta = 25°C
Min Typ Max
1.5 — —
3.15 — —
4.2 — —
— — 0.5
— — 1.35
— — 1.8
1.9 2.0 —
4.4 4.5 —
5.9 6.0 —
4.18 — —
5.68 — —
— 0.0 0.1
— 0.0 0.1
— 0.0 0.1
— — 0.26
— — 0.26
— — ±0.1
— — 2.0
Ta = –40 to+85°C
Min Max Unit
Test Conditions
1.5 — V
3.15 —
4.2 —
— 0.5 V
— 1.35
— 1.8
1.9 — V Vin = VIH or VIL IOH = –20 µA
4.4 —
5.9 —
4.13 —
IOH = –4 mA
5.63 —
IOH = –5.2 mA
— 0.1 V Vin = VIH or VIL IOL = 20 µA
— 0.1
— 0.1
— 0.33
IOL = 4 mA
— 0.33
IOL = 5.2 mA
±1.0 µA Vin = VCC or GND
— 20 µA Vin = VCC or GND, Iout = 0 µA
Rev.2.00, Oct 06, 2005 page 3 of 6










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