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PDF GPT1001A Data sheet ( Hoja de datos )
| Número de pieza | GPT1001A | |
| Descripción | General Touch Sensor Controller | |
| Fabricantes | Generalplus | |
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GPT1001A
General Touch Sensor Controller
May 02, 2012
Version 1.0
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
1 page  
GPT1001A
5. SIGNAL DESCRIPTIONS
Mnemonic
IOA[7:0]
PIN No.
27-30,
22-19
Package No.
LQFP32 SSOP20
26-29,
21-18
13-16,
12-9
Type
I/O
IOB[7:0] 26-23, 9-12 25-22,
8-11
-
I/O
IOC[7:0] 31-32, 1-2, 30-32, 1, 17-20
5-8 4-7
I/O
RESETB
4
32I
TEST
ICECLK
ICESDA
VDD5V
VSS5V
VDD3V
VSS3V
3
16
15
13
18
14
17
21I
15 6
I
14 5 I/O
12 3
I
17 8
I
13 4 O
16 7
I
Description
8-bit I/O port, each pin can be set as an input or output individually.
Input mode: Each one of IOA [7:0] is a CMOS input with programmable internal
pull-low resistors.
Output mode: CMOS output.
All pins are capable of wakeup and external interrupt function is available on IOA2
or IOA4.
IOA can be programmed as special function IO for I2C(IOA[1:0]) or SPI(IOA[3:0])
interface, or sensor IO inputs.
8-bit I/O port, every two pins can be set as an input or output individually.
Input mode: Every two pins can be programmed as CMOS input pin with internal
pull-low resistors.
Output mode: Every two pins can be programmed as CMOS output or open-drain
output.
IOB can be programmed as PWM output or sensor IO inputs.
8-bit I/O port, every two pins can be set as an input or output individually.
Input mode: Every two pins can be programmed as CMOS input pin with internal
pull-low resistors.
Output mode: Every two pins can be programmed as CMOS output or open-drain
output.
IOC can be programmed as PWM output or sensor IO inputs.
System reset input.
It is LOW-active and with internal pull-high resistor. All of the internal registers are
reset to the default state when this pin is set to Low level.
IC Test pin: It is HIGH-active and with internal pull-low resistor.
User must leave this pin opened to work in normal mode.
ICE clock signal.
Should be connected to ground if not in development mode.
ICE data signal.
Should be kept floating if not in development mode
IO and regulator power input.
IO and regulator ground input.
Regulator output for core logic circuit power.
Ground input pin for core logic circuit.
© Generalplus Technology Inc.
Proprietary & Confidential
5
May 02, 2012
Version: 1.0
5 Page 
GPT1001A
6.6. Low Voltage Reset
The GPT1001A has a Low Voltage Reset (LVR) function. In
general, the CPU becomes unstable and malfunctioned when the
power voltage drops below specific operating voltage. With the
unique design of Low Voltage Reset in GPT1001A, it is able to
reset all functions to the initial operation (stable) state if the VDD
power-supply voltage drops below 2.6V.
(The LVR function is the same as Power ON Reset or External Reset.)
6.7. Timer/Counter
The GPT1001A has a built-in 8-bit timer/counter. It is a up-count
and reloadable counter. When the counter rolls from $FF to $00,
the carry (overflow) signal will reload user’s preset value into timer
automatically and up-count again. At the same time, the carry
signal will generate an INT signal if the corresponding bit is
enabled in the INT ENABLE Register. User can read the counter
value while it is running without influencing the timer/counter or
reset it. Moreover, the counter overflow signal becomes a toggle
output to IOA4 or IOA5 to support the application such as IR
carrier frequency generating.
There is also a built-in timer for automatically sleep/wake-up
system inside GPT1001A. The sleep timer can be programmed
from 0.9765ms to 62.5ms to fit performance and power needs.
Clock source of Timer/Counter can be selected as follows:
Timer/Counter
Clock Source
TMR
8-bit Timer
8MHz, 2MHz, 500KHz, 250KHz, 125KHz, external clock input from IOA5 or IOA3
© Generalplus Technology Inc.
Proprietary & Confidential
11
May 02, 2012
Version: 1.0
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet GPT1001A.PDF ] | |
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