Datasheet MACHXO2 Equivalent ( PDF )

N.º	Número de pieza	Descripción	Fabricantes	PDF
1	MACHXO2	MachXO2 Family MachXO2™ Family Data Sheet DS1035 Version 01.9, April 2012 MachXO2 Family Data Sheet Introduction March 2012 Features  Flexible Logic Architecture • Six devices with 256 to 6864 LUT4s and  19 to 335 I/Os  Ultra Low Power Devices • Advanced 65 nm low power process • As low as 19 µ	Lattice

MACH Datasheet ( Hoja de datos ) - resultados coincidentes

Número de pieza	Descripción	Fabricantes	PDF
MACH110-15JC	High-Density EE CMOS Programmable Logic FINAL COM’L: -12/15/20 IND: -14/18/24 MACH110-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS s 44 Pins s 32 Macrocells s 12 ns tPD Commercial 14 ns tPD Industrial s 77 MHz fCNT s 38 Inputs s 32 Outputs Lattice Semiconductor s 32 Flip-flops; 2	Lattice
MACHXO2	MachXO2 Family MachXO2™ Family Data Sheet DS1035 Version 01.9, April 2012 MachXO2 Family Data Sheet Introduction March 2012 Features  Flexible Logic Architecture • Six devices with 256 to 6864 LUT4s and  19 to 335 I/Os  Ultra Low Power Devices • Advanced 65 nm low power process	Lattice
MACH435-15JC	High-Density EE CMOS Programmable Logic FINAL COM’L: -12/15/20, Q-20/25 MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS s 84 Pins in PLCC s 128 Macrocells s 12 ns tPD s 83.3 MHz fCNT s 70 Inputs with pull-up resistors s 64 Outputs s 192 Flip-flops — 128 Macrocell flip	Lattice

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