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PDF CPC7556 Data sheet ( Hoja de datos )

Número de pieza CPC7556
Descripción Diode Bridge
Fabricantes Clare 
Logotipo Clare Logotipo



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Bridge Characteristics
Parameter
Rating
Reverse Voltage
Forward Current
Thyristor Current
100
240
120
Units
V
mArms
mA
Features
Monolithic Construction
Surface Mount Package
Applications
Telecommunications Protection Clamp
High Voltage Multiplexer/Switch
High Voltage ESD Clamp
Pb
RoHS
2002/95/EC
e3
CPC7556N Diagram
A/B
B/A
CPC7556
Diode Bridge with Integrated
Adjustable OVP Circuit
Description
100V Diode Bridge with an integrated Over-Voltage
Protection (OVP) thyristor uses Clare's High Voltage
SOI technology.
The CPC7556N integrated diode bridge offers
protection from high voltage transients by means of an
adjustable voltage clamp. The clamp performs two
actions, first to limit the voltage across the diode
bridge rectified outputs to a value determined by
external resistors and the gate voltage and second to
fully discharge the V+ to Voutputs when the Gate’s
trigger threshold is exceeded during the voltage
limiting function. The rectified outputs are discharged
as a result of the voltage fold-back function of the OVP
device. Voltage fold back of the OVP circuit will
continue until the current through the protector falls
below the hold current threshold.
Terminating the gate to Vwill disable the clamp
voltage feature up to the thyristor’s off state voltage.
Ordering Information
Part Description
CPC7556N 8-Pin SOIC in Tubes (50/Tube)
CPC7556NTR 8-Pin SOIC Tape & Reel (1000/Reel)
+
A
KG
-
DS-CPC7556 - R02
www.clare.com
1

1 page




CPC7556 pdf
CPC7556
3 Manufacturing Information
3.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. Clare classified
all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint
industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our
products to the maximum conditions set forth in the standard, and guarantee proper operation of our
devices when handled according to the limitations and information in that standard as well as to any limitations set
forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to
the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device
CPC7556N
Moisture Sensitivity Level (MSL) Rating
MSL 1
3.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard
JESD-625.
3.3 Reflow Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of
J-STD-020 must be observed.
Device
CPC7556N
Maximum Temperature x Time
260C for 30 seconds
3.4 Board Wash
Clare recommends the use of no-clean flux formulations. However, board washing to remove flux residue is
acceptable. The use of a short drying bake may be necessary if a wash is used after solder reflow processes.
Chlorine-based or Fluorine-based solvents or fluxes should not be used. Cleaning methods that employ ultrasonic
energy should not be used.
Pb
RoHS
2002/95/EC
e3
5
www.clare.com
R02

5 Page










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