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PDF MC10E112 Data sheet ( Hoja de datos )
| Número de pieza | MC10E112 | |
| Descripción | QUAD DRIVER | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC10E112 (archivo pdf) en la parte inferior de esta página. Total 4 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad Driver
The MC10E/100E112 is a quad driver with two pairs of OR/NOR
outputs from each gate, and a common, buffered enable input. Using the
data inputs the device can serve as an ECL memory address fan-out
driver. Using just the enable input, the device serves as a clock driver,
although the MC10E/100E111 is designed specifically for this purpose,
and offers lower skew than the E112. For memory address driver
applications where scan capabilities are required, please refer to the
E212 device.
• 600ps Max. Propagation Delay
• Common Enable Input
• Extended 100E VEE Range of – 4.2V to – 5.46V
• 75kΩ Input Pulldown Resistors
MC10E112
MC100E112
QUAD DRIVER
Pinout: 28-Lead PLCC (Top View)
VCCO
Q3b Q3a Q3b Q3a VCCO Q2b Q2a
25 24 23 22 21 20 19
26 18
Q2b
D3 27
17 Q2a
D2 28
16 VCC
VEE 1
15 Q1b
D1 2
D0 3
EN 4
14 Q1a
13 Q1b
12 Q1a
5 6 7 8 9 10 11
NC VCCO Q0a Q0b Q0a Q0b VCCO
* All VCC and VCCO pins are tied together on the die.
PIN NAMES
Pin
D0 – D3
EN
Qna, Qnb
Qna, Qnb
Data Inputs
Enable Input
True Outputs
Inverting Outputs
Function
12/93
© Motorola, Inc. 1996
2–1
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
LOGIC DIAGRAM
Q0a
D0 Q0b
Q0a
Q0b
Q1a
D1 Q1b
Q1a
Q1b
Q2a
D2 Q2b
Q2a
Q2b
Q3a
D3 Q3b
Q3a
Q3b
EN
REV 2
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet MC10E112.PDF ] | |
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