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PDF CY7C65213 Data sheet ( Hoja de datos )

Número de pieza CY7C65213
Descripción USB-UART LP Bridge Controller
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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CY7C65213
CY7C65213A
USB-UART LP Bridge Controller
USB-UART LP Bridge Controller
Features
USB 2.0 certified, Full-Speed (12 Mbps)
Supports communication driver class (CDC), personal health
care device class (PHDC), and vendor-device class
Battery charger detection (BCD) compliant with USB Battery
Charging Specification Rev. 1.2 (peripheral detect only)
Integrated USB termination resistors
Single-channel configurable UART interfaces
Supports 2-pin, 4-pin, 6-pin, 8-pin UART interface
Data rates up to 3 Mbps
256 bytes for each transmit and receive buffer
Data format:
• 7 or 8 data bits
• 1 or 2 stop bits
• No parity, even, odd, mark, or space parity
Supports parity, overrun, and framing errors
Supports flow control using CTS, RTS, DTR, DSR
Supports UART break signal
CY7C65213 supports single channel RS232/RS422
interfaces whereas CY7C65213A supports
RS232/RS422/RS485 interfaces
General-purpose input/output (GPIO): 8 pins
Supports unique serial number feature for each device, which
fixes the COM port number permanently when USB-UART LP
Bridge controller device plugs in
Configuration utility (Windows) to configure the following:
Vendor ID (VID), Product ID (PID), and Product and
Manufacturer descriptors
UART
Charger detection
GPIO
Driver support for VCOM and DLL
Windows 10: 32- and 64-bit versions
Windows 8.1: 32- and 64-bit versions
Windows 8: 32- and 64-bit versions
Windows 7: 32- and 64-bit versions
Windows Vista: 32- and 64-bit versions
Windows XP: 32- and 64-bit versions
Windows CE
Mac OS-X: 10.6, and later versions
Linux: Kernel version 2.6.35 and later versions
Android: Gingerbread and later versions
512-byte flash for storing configuration parameters
Clocking: Integrated 48-MHz clock oscillator
USB suspend mode for low power
Supports bus-/self-powered configurations
Compatible with USB 2.0 and USB 3.0 host controllers
Operating voltage: 1.71 to 5.50 V
Operating temperature:
Commercial: 0 °C to 70 °C
Industrial: –40 °C to 85 °C
ESD protection: 2.2-kV HBM
RoHS-compliant package
28-pin SSOP (10 × 7.5 × 1.65 mm, 0.65-mm pitch)
32-pin QFN (5 × 5 × 1 mm, 0.5-mm pitch)
Ordering part number
CY7C65213-28PVXI
CY7C65213-32LTXI
CY7C65213A-28PVXI
CY7C65213A-32LTXI
Applications
Blood glucose meter
Battery-operated devices
USB-to-UART cables
Enables USB connectivity in legacy peripherals with UART
Point-of-Sale (POS) terminals
Industrial and T&M (Test and Measurement) devices
USB Compliant
The USB-UART LP Bridge controller (CY7C65213 and CY7C65213A) is fully compliant with the USB 2.0
specification, USB-IF Test-ID (TID) 40860041.
Table 1. CY7C65213 and CY7C65213-A Features Comparison
Features
RS-485 Support
CY7C65213
No
CY7C65213-A
Yes
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-81011 Rev. *M
• San Jose, CA 95134-1709 • 408-943-2600
Revised August 9, 2016

1 page




CY7C65213 pdf
CY7C65213
CY7C65213A
application reduces device data backlog. After it reaches the
75% watermark level, the RTS# signal is asserted to resume
data reception.
DSR# (Input) / DTR# (Output)
The DSR#/DTR# signals are used to establish a communication
link with the UART. These signals complement each other in their
functionality, similar to CTS# and RTS#.
GPIO Interface
CY7C65213/CY7C65213A has eight GPIOs. The configuration
utility lets you configure the GPIO pins. The configurable options
are as follows:
TRISTATE: GPIO tristated
DRIVE 1: Output static 1
DRIVE 0: Output static 0
POWER#: Power control for bus power designs
TXLED#: Drives LED during USB transmit
RXLED#: Drives LED during USB receive
TX or RX LED#: Drives LED during USB transmit or receive.
GPIO can be configured to drive LED at 8-mA drive strength.
SLEEP#: Indicates USB suspend
BCD0/1: Two-pin output to indicate the type of USB charger
BUSDETECT: Connects VBUS pin for USB host detection
Memory
CY7C65213/CY7C65213A has a 512-byte flash. Flash is used
to store USB parameters, such as VID/PID, serial number, and
Product and Manufacturer Descriptors, which can be
programmed by the configuration utility.
System Resources
Power System
CY7C65213/CY7C65213A supports the USB Suspend mode to
control power usage. CY7C65213/CY7C65213A operates in
bus-powered or self-powered modes over a range of 3.15 V to
5.5 V.
Clock System
CY7C65213/CY7C65213A has a fully integrated clock and does
not require any external crystal. The clock system is responsible
for providing clocks to all subsystems.
Internal 48-MHz Oscillator
The internal 48-MHz oscillator is the primary source of internal
clocking in the CY7C65213/CY7C65213A device.
Internal 32-kHz Oscillator
The internal 32-kHz oscillator is the primary source of internal
clocking in CY7C65213/CY7C65213A.
Reset
The reset block ensures reliable power-on reset and brings the
device back to the default known state. The RESET# (active low)
pin can be used by external devices to reset the
CY7C65213/CY7C65213A.
Suspend and Resume
The CY7C65213/CY7C65213A device asserts the SLEEP# pin
when the USB bus goes into the suspend state. This helps to
meet the stringent suspend current requirements of the USB 2.0
specification, while using the device in bus-powered mode. The
device resumes from the suspend state under either of the
following two conditions:
1. Any activity is detected on the USB bus
2. The RI# (configured as wakeup) pin is asserted to generate
remote wakeup to the host.
WAKEUP
The RI# (configured as wakeup) pin is used to generate the
remote wakeup signal on the USB bus. The remote wakeup
signal is sent only if the host enables this feature through the
SET_FEATURE request. The device communicates support for
the remote wakeup to the host through the configuration
descriptor during the USB enumeration process. The
CY7C65213 device allows enabling/disabling of the remote
wakeup feature through the configuration utility.
Software
Cypress delivers a complete set of software drivers and a
configuration utility to enable product configuration during
system development.
Drivers for Linux Operating Systems
Cypress provides a User Mode USB driver library
(libcyusbserial.so) that abstracts vendor commands for the
UART interface and provides a simplified API interface for user
applications. This library uses the standard open-source libUSB
library to enable USB communication. The Cypress serial library
supports the USB plug-and-play feature using the Linux ‘udev’
mechanism.
CY7C65213/CY7C65213A supports the standard USB CDC
UART-class driver, which is bundled with the Linux kernel.
Android Support
The CY7C65213/CY7C65213A solution also includes an
Android Java class–CyUsbSerial.java–which exposes a set of
interface functions to communicate with the device.
Drivers for Mac OSx
Cypress delivers a dynamically linked shared library
(CyUSBSerial.dylib) based on libUSB, which enables
communication to the CY7C65213/CY7C65213A device.
In addition, the device also supports the native Mac OSx CDC
UART-class driver.
Document Number: 001-81011 Rev. *M
Page 5 of 29

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CY7C65213 arduino
CY7C65213
CY7C65213A
Reset
Table 7. Reset DC Specifications
Parameter
VIH
VIL
Rpullup
CIN
Vhysxres
Description
Input voltage high threshold
Input voltage low threshold
Pull-up resistor
Input capacitance
Input voltage hysteresis
Min Typ Max Units
0.7 × VCCIO
– – 0.3 × VCCIO
3.5 5.6 8.5
V
V
k
– 5 – pF
– 100 –
mV
Details/Conditions
Table 8. Reset AC Specifications
Parameter
Description
Tresetwidth
Reset pulse width
UART
Table 9. UART AC Specifications
Parameter
FUART
Description
UART bit rate
Flash Memory
Table 10. Flash Memory Specifications
Parameter
Fend
Fret
Description
Flash endurance
Flash retention. TA 85 °C, 10 K
program/erase cycles
Min
Typ Max
Units
Details/Conditions
1 – – µs
Min
Typ Max
Units
Details/Conditions
0.3
3,000
kbps
Min
100K
10
Typ Max Units Details/Conditions
– – cycles
– – years
Document Number: 001-81011 Rev. *M
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