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PDF SSM3302 Data sheet ( Hoja de datos )
| Número de pieza | SSM3302 | |
| Descripción | 2 x 10 W Filterless Class-D Stereo Audio Amplifier | |
| Fabricantes | Analog Devices | |
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Data Sheet
FEATURES
Filterless stereo Class-D amplifier with Σ-Δ modulation
2 × 10 W into 4 Ω load and 2 × 8 W into 8 Ω load at 12 V supply
with <1% total harmonic distortion plus noise (THD + N)
91% efficiency at 12 V, 8 W into 8 Ω speaker
98 dB signal-to-noise ratio (SNR)
Single-supply operation from 7 V to 18 V
Flexible gain adjustment pin from 9 dB to 24 dB
Fixed input impedance of 40 kΩ
Mono output mode pin for 1 × 20 W output power into 2 Ω
10 µA shutdown current
Short-circuit and thermal protection
Available in a 40-lead, 6 mm × 6 mm LFCSP
Pop-and-click suppression
User-selectable ultralow EMI emissions mode
Thermal warning indicator
Power-on reset
APPLICATIONS
Mobile computing
Flat panel televisions
Media docking stations
Portable electronics
Sound bars
GENERAL DESCRIPTION
The SSM3302 is a fully integrated, high efficiency, stereo Class-D
audio amplifier. The application circuit requires minimal external
components and operates from a single 7 V to 18 V supply. The
device is capable of delivering 2 × 10 W of continuous output
power into a 4 Ω load (or 2 × 8 W into 8 Ω) with <1% THD + N
from a 12 V supply. In addition, while mono mode is activated,
the user can drive a load as small as 2 Ω up to 20 W continuous
output power by stacking the stereo output terminals.
The SSM3302 features a high efficiency, low noise modulation
scheme that requires no external LC output filters. This scheme
continues to provide high efficiency even at low output power.
The SSM3302 operates with 90% efficiency at 7 W into an 8 Ω
2 ×10 W Filterless Class-D
Stereo Audio Amplifier
SSM3302
load or with 82% efficiency at 10 W into 4 Ω from a 12 V supply,
and it has an SNR of >98 dB.
Spread spectrum pulse density modulation (PDM) is used to
provide lower EMI radiated emissions compared with other
Class-D architectures. The SSM3302 includes an optional
modulation select pin (ultralow EMI emission mode) that
significantly reduces the radiated emissions at the Class-D
outputs, particularly above 100 MHz. The SSM3302 can pass
FCC Class-B emissions testing with an unshielded 20 inch cable
using common-mode choke-based filtering.
The fully differential input of the SSM3302 provides excellent
rejection of common-mode noise on the input. The device also
includes a highly flexible gain select pin that only requires one
series resistor to choose a gain between 9 dB and 24 dB, with no
change to the input impedance. The benefit of this is to improve
gain matching between multiple SSM3302 devices within a single
application compared with using external resistors to set gain.
The SSM3302 includes an integrated voltage regulator that
generates a 5 V rail.
The SSM3302 has a micropower shutdown mode with a typical
shutdown current of 10 µA. Shutdown is enabled by applying a
logic low to the SD pin. The device also includes pop-and-click
suppression circuitry that minimizes voltage glitches at the output
during turn on and turn off, reducing audible noise during
activation and deactivation.
Other included features to simplify system level integration of
the SSM3302 are input low-pass filtering to suppress out-of-
band DAC noise interference to the pulse density modulator,
fixed input impedance to simplify component selection across
multiple platform production builds, and a thermal warning
indicator pin.
The SSM3302 is specified over the commercial temperature
range (−40°C to +85°C). It has built-in thermal shutdown and
output short-circuit protection. It is available in a halide-free,
40-lead, 6 mm × 6 mm lead frame chip scale package (LFCSP).
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2012–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
SSM3302
Data Sheet
SPECIFICATIONS
PVDD = 12 V, TA = 25oC, RL = 8 Ω + 64 μH, EDGE = AGND, gain = 9 dB, VREG = off, unless otherwise noted.
Table 1.
Parameter
DEVICE CHARACTERISTICS
Output Power/Channel
Efficiency
Total Harmonic
Distortion + Noise
Input Common-Mode
Voltage Range
Common-Mode
Rejection Ratio
Channel Separation
Average Switching
Frequency
Differential Output
Offset Voltage
POWER SUPPLY
Supply Voltage Range
Power Supply Rejection
Ratio
Supply Current (Stereo)
Symbol Test Conditions/Comments
Min
PO
η
THD + N
RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 15 V
RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 12 V
RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 7 V
RL = 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 15 V
RL = 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 12 V
RL = 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 7 V
RL = 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 15 V
RL = 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 12 V
RL = 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 7 V
RL = 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 15 V
RL = 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 12 V
RL = 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 7 V
RL = 2 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 12 V
(mono mode)
RL = 2 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, PVDD = 7 V
(mono mode)
RL = 2 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 12 V
(mono mode)
RL = 2 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, PVDD = 7 V
(mono mode)
PO = 7 W, 8 Ω, PVDD = 12 V, EDGE = low (normal operation)
PO = 7 W, 8 Ω, PVDD = 12 V, EDGE = AVDD (ultralow
EMI mode)
PO = 5 W into 8 Ω, f = 1 kHz, PVDD = 12 V
VCM
CMRR VCM = 2.5 V ± 100 mV at 1 kHz, output referred
XTALK
fSW
PO = 0.5 W, f = 1 kHz
VOOS Gain = 9 dB
1.0
PVDD
PSRRDC
PSRRAC
ISYPVDD
Guaranteed from PSRR test
PVDD = 7 V to 15 V, dc input floating
7
VRIPPLE = 100 mV at 1 kHz, inputs are ac grounded, CIN = 0.1 µF
VIN = 0 V, load = 8 Ω + 68 µH, PVDD = 15 V, VREGEN = AVDD
(internal VREG active)
VIN = 0 V, load = 8 Ω + 68 µH, PVDD = 15 V, VREGEN = AGND
(internal VREG disabled)
VIN = 0 V, load = 8 Ω + 68 µH, PVDD = 12 V, VREGEN = AGND
(internal VREG disabled)
VIN = 0 V, load = 8 Ω + 68 µH, PVDD = 7 V, VREGEN = AGND
(internal VREG disabled)
Typ
121
8
2.7
151
10
3.2
201
131
4.8
241
161
5.7
292
9.42
36.62
12.72
91.5
82
0.01
43
80
300
70
80
12.2
6.2
5
3
Max Unit
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
%
%
%
AVDD − 1 V
dB
dB
kHz
3.0 mV
18 V
dB
dB
mA
mA
mA
mA
Rev. A | Page 4 of 20
5 Page 
SSM3302
100
PVDD = 18V
RL = 8Ω + 33µH
GAIN = 9dB
10 EDGE = LOW
1
0.1
0.01
PO = 2.5W
PO = 5W
PO = 10W
0.001
10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 15. THD + N vs. Frequency;
RL = 8 Ω; PVDD = 18 V; PO = 2.5 W, PO = 5 W, PO = 10 W
100
PVDD = 18V
RL = 4Ω + 15µH
GAIN = 9dB
10 EDGE = 0
1
0.1
PO = 10W PO = 5W
0.01
PO = 2.5W
0.001
10
100 1k 10k
FREQUENCY (Hz)
100k
Figure 16. THD + N vs. Frequency;
RL = 4 Ω; PVDD = 18 V; PO = 2.5 W, PO = 5 W, PO = 10 W
100
PVDD = 18V
RL = 2Ω + 7.5µH
GAIN = 9dB
10 EDGE = 0
MONO = 5V
1
0.1
PO = 0.5W PO = 5W
0.01
PO = 2.5W
0.001
10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 17. THD + N vs. Frequency;
RL = 2 Ω; Mono Mode; PVDD = 18 V; PO = 0.5 W, PO = 2.5 W, PO = 5 W
Data Sheet
16
14
12 8Ω + 33µH
10
NO LOAD
4Ω + 15µH
8
6
4
2
0
7 8 9 10 11 12 13 14 15 16 17
SUPPLY VOLTAGE (V)
Figure 18. Quiescent Current vs. Supply Voltage,
RL = 8 Ω + 33 µH, No Load, , RL = 4 Ω + 15 µH
18
16
NO LOAD
14
12
4Ω + 15µH
10
2Ω + 7.5µH
8
6
4
2
0
7 8 9 10 11 12 13 14 15 16 17 18
SUPPLY VOLTAGE (V)
Figure 19. Quiescent Current vs. Supply Voltage,
Mono Mode, No Load, RL = 4 Ω + 15 µH, RL = 2 Ω + 7.5 µH
25
RL = 8Ω + 33µH
GAIN = 9dB
EDGE = 0
20
15
THD = 10%
10
THD + N = 1%
5
0
7 9 11 13 15 17
SUPPLY VOLTAGE (V)
Figure 20. Maximum Output Power vs. Supply Voltage;
RL = 8 Ω; THD + N = 1%, THD + N = 10%
Rev. A | Page 10 of 20
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet SSM3302.PDF ] | |
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