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PDF LTC2410 Data sheet ( Hoja de datos )
| Número de pieza | LTC2410 | |
| Descripción | 24-Bit No Latency ADC | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
nn Differential Input and Differential Reference with
GND to VCC Common Mode Range
nn 2ppm INL, No Missing Codes
nn 2.5ppm Full-Scale Error
nn 0.1ppm Offset
nn 0.16ppm Noise
nn Single Conversion Settling Time for Multiplexed
Applications
nn Internal Oscillator—No External Components
Required
nn 110dB Min, 50Hz or 60Hz Notch Filter
nn 24-Bit ADC in Narrow SSOP-16 Package
(SO-8 Footprint)
nn Single Supply 2.7V to 5.5V Operation
nn Low Supply Current (200µA) and Auto Shutdown
nn Fully Differential Version of LTC2400
APPLICATIONS
nn Direct Sensor Digitizer
nn Weight Scales
nn Direct Temperature Measurement
nn Gas Analyzers
nn Strain-Gauge Transducers
nn Instrumentation
nn Data Acquisition
nn Industrial Process Control
nn 6-Digit DVMs
LTC2410
24-Bit No Latency ∆Σ™ ADC
with Differential Input and
Differential Reference
DESCRIPTION
The LTC®2410 is a 2.7V to 5.5V micropower 24-bit dif-
ferential ∆Σ analog to digital converter with an integrated
oscillator, 2ppm INL and 0.16ppm RMS noise. It uses
delta-sigma technology and provides single cycle settling
time for multiplexed applications. Through a single pin,
the LTC2410 can be configured for better than 110dB
input differential mode rejection at 50Hz or 60Hz ±2%, or
it can be driven by an external oscillator for a user defined
rejection frequency. The internal oscillator requires no
external frequency setting components.
The converter accepts any external differential reference
voltage from 0.1V to VCC for flexible ratiometric and re-
mote sensing measurement configurations. The full-scale
differential input range is from –0.5VREF to 0.5VREF. The
reference common mode voltage, VREFCM, and the input
common mode voltage, VINCM, may be independently set
anywhere within the GND to VCC range of the LTC2410. The
DC common mode input rejection is better than 140dB.
The LTC2410 communicates through a flexible 3-wire
digital interface which is compatible with SPI and MI-
CROWIRE protocols.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and No
Latency ∆Σ is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
TYPICAL APPLICATION
2.7V TO 5.5V
1µF
2 VCC
FO 14
LTC2410
REFERENCE
VOLTAGE
0.1V TO VCC
3 REF+
4 REF–
SCK 13
ANALOG INPUT RANGE
–0.5VREF TO 0.5VREF
5 IN+
6 IN–
1, 7, 8, 9, 10, 15, 16 GND
SDO 12
CS 11
VCC= INTERNAL OSC/50Hz REJECTION
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/60Hz REJECTION
3-WIRE
SPI INTERFACE
2410 TA01
BRIDGE
IMPEDANCE
100Ω TO 10k
For more information www.linear.com/LTC2410
VCC 1µF
3
REF+
2
VCC
12
5 IN+
6 IN–
LTC2410
4 REF – GND
FO
13
11
1, 7, 8
9, 10,
15, 16
14
2410 TA02
SDO
SCK
CS
3-WIRE
SPI INTERFACE
2410fa
1
1 page  
LTC2410
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
fEOSC
tHEO
tLEO
tCONV
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time
FO = 0V
FO = VCC
External Oscillator (Note 11)
l 2.56
500
l 0.25
390
l 0.25
390
l 130.86 133.53 136.20
l 157.03 160.23 163.44
l 20510/fEOSC (in kHz)
kHz
µs
µs
ms
ms
ms
fISCK
DISCK
fESCK
tLESCK
tHESCK
Internal SCK Frequency
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK Low Period
External SCK High Period
Internal Oscillator (Note 10)
External Oscillator (Notes 10, 11)
(Note 10)
(Note 9)
(Note 9)
(Note 9)
l 45
l
l 250
l 250
19.2
fEOSC/8
55
2000
kHz
kHz
%
kHz
ns
ns
tDOUT_ISCK Internal SCK 32-Bit Data Output Time Internal Oscillator (Notes 10, 12)
External Oscillator (Notes 10, 11)
l 1.64 1.67 1.70
l 256/fEOSC (in kHz)
ms
ms
tDOUT_ESCK External SCK 32-Bit Data Output Time
t1 CS ↓ to SDO Low Z
t2 CS ↑ to SDO High Z
(Note 9)
l 32/fESCK (in kHz)
l0
200
l0
200
ms
ns
ns
t3 CS ↓ to SCK ↓
(Note 10)
l0
200 ns
t4 CS ↓ to SCK ↑
(Note 9)
l 50
ns
tKQMAX SCK ↓ to SDO Valid
l 220 ns
tKQMIN
SDO Hold After SCK ↓
(Note 5)
l 15
ns
t5 SCK Set-Up Before CS ↓
l 50
ns
t6 SCK Hold After CS ↓
l 50 ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND.
VNVRIoNEteF==3IN:R+VEC–FC+IN=––2R,.V7EFItN–oC, M5V.R5=EVF(CIuNMn+l=e+s(IsRNoE–tF)h/+2e+.rwRiEseF–s)p/2e;cified.
Note 4: FO pin tied to GND or to VCC or to external conversion clock source
with fEOSC = 153600Hz unless otherwise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: FO = 0V (internal oscillator) or fEOSC = 153600Hz ±2% (external
oscillator).
Note 8: FO = VCC (internal oscillator) or fEOSC = 128000Hz ±2% (external
oscillator).
Note 9: The converter is in external SCK mode of operation such that the
SCK pin is used as digital input. The frequency of the clock signal driving
SCK during the data output is fESCK and is expressed in kHz.
Note 10: The converter is in internal SCK mode of operation such that the
SCK pin is used as digital output. In this mode of operation the SCK pin
has a total equivalent load capacitance CLOAD = 20pF.
Note 11: The external oscillator is connected to the FO pin. The external
oscillator frequency, fEOSC, is expressed in kHz.
Note 12: The converter uses the internal oscillator.
FO = 0V or FO = VCC.
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
For more information www.linear.com/LTC2410
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5 Page 
FUNCTIONAL BLOCK DIAGRAM
VCC
GND
IN+ +
∫IN– –
REF+
REF –
∫∫
–+
DAC
∑
ADC
Figure 1. Functional Block Diagram
AUTOCALIBRATION
AND CONTROL
DECIMATING FIR
LTC2410
INTERNAL
OSCILLATOR
FO
(INT/EXT)
SERIAL
INTERFACE
SDO
SCK
CS
2410 FD
TEST CIRCUIT
SDO
1.69k
CLOAD = 20pF
Hi-Z TO VOH
VOL TO VOH
VOH TO Hi-Z
2410 TA03
VCC
1.69k
SDO
CLOAD = 20pF
2410 TA04
Hi-Z TO VOL
VOH TO VOL
VOL TO Hi-Z
For more information www.linear.com/LTC2410
2410fa
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC2410.PDF ] | |
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