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PDF AS29LV800T-80TC Data sheet ( Hoja de datos )

Número de pieza AS29LV800T-80TC
Descripción 3V 1M8/512K16 CMOS Flash EEPROM
Fabricantes ANADIGICS Inc 
Logotipo ANADIGICS  Inc Logotipo



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No Preview Available ! AS29LV800T-80TC Hoja de datos, Descripción, Manual

Advanced Information
October 2000
AS29LV800
®
3V 1M×8/512K×16 CMOS Flash EEPROM
Features
• Organization: 1M×8/512K×16
• Sector architecture
- One 16K; two 8K; one 32K; and fifteen 64K byte sectors
- One 8K; two 4K; one 16K; and fifteen 32K word sectors
- Boot code sector architecture—T (top) or B (bottom)
- Erase any combination of sectors or full chip
• Single 2.7-3.6V power supply for read/write operations
• Sector protection
• High speed 80/90/120 ns address access time
• Automated on-chip programming algorithm
- Automatically programs/verifies data at specified ad-
dress
• Automated on-chip erase algorithm
- Automatically preprograms/erases chip or specified
sectors
• Hardware RESET pin
- Resets internal state machine to read mode
• Low power consumption
- 200 nA typical automatic sleep mode current
- 200 nA typical standby current
- 10 mA typical read current
• JEDEC standard software, packages and pinouts
- 48-pin TSOP
- 44-pin SO
• Detection of program/erase cycle completion
- DQ7 DATA polling
- DQ6 toggle bit
- DQ2 toggle bit
- RY/BY output
• Erase suspend/resume
- Supports reading data from or programming data to a
sector not being erased
• Low VCC write lock-out below 1.5V
• 10 year data retention at 150C
• 100,000 write/erase cycle endurance
Logic block diagram
VCC
VSS
RESET
RY/BY
Sector protect/
erase voltage
switches
Erase voltage
generator
DQ0–DQ15
Input/output
buffers
WE
BYTE
Program/erase
control
Command
register
CE
OE
A-1
Program voltage
generator
Chip enable
Output enable
Logic
STB Data latch
STB Y decoder
Y gating
VCC detector Timer
A0–A18
X decoder
Cell matrix
Pin arrangement
48-pin TSOP
AS29LV800
44-pin SO
RY/BY
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 RESET
43 WE
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BYTE
32 VSS
31 DQ15/A-1
30 DQ7
29 DQ14
28 DQ6
27 DQ13
26 DQ5
25 DQ12
24 DQ4
23 VCC
Selection guide
Maximum access time
Maximum chip enable access time
Maximum output enable access time
tAA
tCE
tOE
29LV800-80
80
80
30
29LV800-90
90
90
35
29LV800-120
120
120
50
Unit
ns
ns
ns
DID 11-40002-A. 10/19/00
ALLIANCE SEMICONDUCTOR
1
Copyright ©1998 Alliance Semiconductor. All rights reserved.

1 page




AS29LV800T-80TC pdf
October 2000
AS29LV800
®
ID Sector address table
Secto
r
Bottom boot sector address
(AS29LV800B)
A18 A17 A16 A15 A14 A13 A12
0 000 000X
1 0000010
2 0000011
3 0 0 0 0 1 XX
4 0 0 0 1 XXX
5 0 0 1 0 XXX
6 0 0 1 1 XXX
7 0 1 0 0 XXX
8 0 1 0 1 XXX
9 0 1 1 0 XXX
10 0 1 1 1 X X X
11 1 0 0 0 X X X
12 1 0 0 1 X X X
13 1 0 1 0 X X X
14 1 0 1 1 X X X
15 1 1 0 0 X X X
16 1 1 0 1 X X X
17 1 1 1 0 X X X
18 1 1 1 1 X X X
Top boot sector address
(AS29LV800T)
A18 A17 A16 A15 A14 A13 A12
0 0 0 0 XXX
0 0 0 1 XXX
0 0 1 0 XXX
0 0 1 1 XXX
0 1 0 0 XXX
0 1 0 1 XXX
0 1 1 0 XXX
0 1 1 1 XXX
1 0 0 0 XXX
1 0 0 1 XXX
1 0 1 0 XXX
1 0 1 1 XXX
1 1 0 0 XXX
1 1 0 1 XXX
1 1 1 0 XXX
1 1 1 1 0 XX
1111100
1111101
1 1 1 1 1 1X
READ codes
Mode
MFR code (Alliance Semiconductor)
Device code
×8 T boot
×8 B boot
×16 T boot
×16 B boot
Sector protection
Key: L =Low (<VIL); H = High (>VIH); X =Don’t care
A18–A12
A6 A1 A0 Code
X L L L 52h
X L L H DAh
X L L H 5Bh
X L L H 22DAh
X L L H 225Bh
Sector address L
H
L
01h protected
00h unprotected
DID 11-40002-A. 10/19/00
ALLIANCE SEMICONDUCTOR
5

5 Page





AS29LV800T-80TC arduino
October 2000
Automated on-chip programming algorithm
START
Write program command sequence
(see below)
DATA polling or toggle bit
successfully completed
Last NO
address?
Increment
address
YES
Programming completed
AS29LV800
®
Automated on-chip erase algorithm
START
Write erase command sequence
(see below)
DATA polling or toggle bit
successfully completed
Erase complete
Individual sector/multiple sector
Chip erase command sequence erase command sequence
×16 mode (address/data): ×16 mode (address/data):
555h/AAh
555h/AAh
2AAh/55h
2AAh/55h
555h/80h
555h/80h
Program command sequence
×16 mode (address/data):
555h/AAh
2AAh/55h
555h/A0h
Program address/program data
555h/AAh
2AAh/55h
555h/10h
555h/AAh
2AAh/55h
Sector address/30h
Sector address/30h
Sector address/30h
DID 11-40002-A. 10/19/00
optional sector erase commands
The system software should check the status of DQ3 prior to and following each
subsequent sector erase command to ensure command completion. The device may
not have accepted the command if DQ3 is high on second status check.
ALLIANCE SEMICONDUCTOR
11

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