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PDF CXD2464R Data sheet ( Hoja de datos )
| Número de pieza | CXD2464R | |
| Descripción | Timing Generator for LCD Panels | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXD2464R
Timing Generator for LCD Panels
For the availability of this product, please contact the sales office.
Description
The CXD2464R is a timing signal generator for
driving the LCX026, LCX016 and LCX012BL LCD
panels. This chip has a built-in serial interface circuit
which supports various XGA, SVGA and VGA signals,
and (double speed) NTSC and PAL signals through
external control from a microcomputer, etc.
64 pin LQFP (Plastic)
Features
• Generates the LCX026/LCX016/LCX012BL drive
pulse.
• Supports various SVGA (horizontal scanning frequency:
35 to 54kHz, vertical scanning frequency: 56 to 86Hz)
and VGA (horizontal scanning frequency: 31 to 38kHz,
vertical scanning frequency: 59 to 75Hz) signals.
• Supports simple (skip scan) display of XGA signals
(1024 × 768 dots, horizontal scanning frequency:
57kHz, vertical scanning frequency: 71Hz or less,
clock frequency: 62.5MHz or less).
• Supports simple (skip scan) display of SVGA
signals (800 × 600 dots).
• Supports Macintosh16 signals (LCX016)
• Supports PC-98 signals (640 × 400 dots, horizontal
scanning frequency: 24 to 38kHz, vertical scanning
frequency: 56 to 86Hz).
• Supports NTSC and PAL signals
• Line double-speed display realized with a built-in
double-speed controller (clock frequency: 33.3MHz
or less)
(Line memory µPD485505: NEC)
• Allows control of sample-and-hold position of
CXA2112R sample-and-hold driver.
• Supports up/down inversion and/or right/left inversion.
• Supports line inversion and field inversion
• AC drive of LCD panels during no signal
Note) Supported signals vary according to LCD panel.
Applications
LCD projectors, etc.
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings (Ta = 25°C, VSS = 0V)
• Supply voltage VDD VSS – 0.5 to +7.0 V
• Input voltage
VI VSS – 0.5 to VDD + 0.5 V
• Output voltage VO VSS – 0.5 to VDD + 0.5 V
• Operating temperature
Topr
–20 to +75
°C
• Storage temperature
Tstg –55 to +150
°C
Recommended Operating Conditions
• Supply voltage VDD
4.5 to 5.5
• Operating temperature
Topr
–20 to +75
V
°C
Note) "Macintosh" is a registered trademark of Apple Computer Inc..
"PC-98" is a registered trademark of NEC.
"VGA" is a registered trademark of IBM Corp..
Other company names and product names, etc. contained in these materials are trademarks or registered trademarks
of the respective companies.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E98327-PS
1 page  
CXD2464R
Electrical Characteristics
1. DC characteristics
(VDD = 5.0 ± 0.5V, VSS = 0V, Topr = –20 to +75°C)
Item Symbol
Supply voltage
VDD
Input, output voltages VI, Vo
Input voltage 1
VIH
VIL
Vt+
Input voltage 2
Vt–
Vt+ – Vt–
Output voltage 1
VOH
VOL
Output voltage 2
VOH
VOL
Input leak current
II
IIL
Output leak current IOZ
Current consumption IDD
Conditions
CMOS input
TTL Schmitt
trigger input
IOH = –2mA
IOL = 4mA
IOH = –4mA
IOL = 8mA
∗3
∗5
∗6
∗8
Min.
4.5
VSS
0.7VDD
Typ.
5.0
2.2
VDD – 0.8
0.4
VDD – 0.8
–10
–40 –100
–40
Max.
5.5
VDD
Unit Applicable pins
V
V
0.3VDD
V
XCLR
CKI1, CKI2
HSYNC
0.8
V
VSYNC
SCTR, SCLK
SDAT
V ∗1
0.4
0.4
10
–240
40
56
V ∗2
∗4
µA
XCLR
µA ∗7
mA At a 30pF load
∗1 INV, SHPA, SHPB, SHPC, SHPD, MODE1, MODE2, MODE3, HD, HDN, CLR, ENB, PRG, PCG, CLP1,
CLP2/FLDO, VST, BLK, FRP, XFRP, VCK, DWN, RGT, XRGT, IRACT, ORACT, XHS, XVS
∗2 RSTR, RSTW, RCK, WCK, HCK1, HCK2, HST
∗3 Normal input pins (VIN = VSS or VDD)
∗4 HSYNC, VSYNC, SCLK, SDAT, SCTR, CKI1, CKI2
∗5 Pins with pull-up resistors (VIN = VSS)
∗6 At high impedance (VIN = VSS or VDD)
∗7 SHPA, SHPC
∗8 fclk = 62.5MHz, VDD = 5.0V
–5–
5 Page 
CXD2464R
Input Signal Protocol
1. Horizontal sync signal
a) A standard signal (HSYNC) should be input for the following display modes.
LCX026 : SVGA (800 × 600), VGA/NTSC (640 × 480), PC-98 (640 × 400), PAL (762 × 572)
LCX016 : Macintosh16 (832 × 624), SVGA (800 × 600), VGA/NTSC (640 × 480), PC-98 (640 × 400),
PAL (762 × 572), WIDE (832 × 480)
LCX012BL : VGA/NTSC/PAL (640 × 480), PC-98 (640 × 400)
However, since the CXD2464R requires a double speed signal as input during NTSC/PAL double-
speed display when not using the built-in double-speed controller, a simply double-speeded, 1/2 cycle,
1/2 width horizontal sync signal (HSYNC) should be input at that time.
b) The input sync signal polarity is not fixed, and is set by the serial data (HPOL).
2. Vertical sync signal
a) A sync-separated, normal-speed VSYNC should be input as the vertical sync signal.
b) The input sync signal polarity is not fixed, and is set by the serial data (VPOL).
c) The phase relationship between HSYNC and VSYNC is specified as follows for the CXD2464R.
(1) SVGA, VGA, PC-98 (LCX026)/Macintosh16, SVGA, VGA, PC-98 (LCX016)/VGA, PC-98 (LCX012BL)
HSYNC
VSYNC
Sync signal phase reference
(2) Double-speed NTSC (LCX026/LCX016/LCX012BL)
Double-speed HSYNC
VSYNC
Sync signal phase reference
(3) Double-speed PAL (LCX026/LCX016/LCX012BL)
Double-speed HSYNC
VSYNC
Sync signal phase reference
– 11 –
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CXD2464R.PDF ] | |
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