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PDF TDK5100 Data sheet ( Hoja de datos )
| Número de pieza | TDK5100 | |
| Descripción | ASK/FSK Transmitter 868/433 MHz | |
| Fabricantes | Infineon Technologies AG | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TDK5100 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Wireless Components
ASK/FSK Transmitter 868/433 MHz
TDK 5100 Version 1.1
Specification May 2012
1 page  
TDK 5100
1.1 Overview
The TDK 5100 is a single chip ASK/FSK transmitter for the frequency bands
433-435 MHz and 868-870 MHz. The IC offers a high level of integration and
needs only a few external components. The device contains a fully integrated
PLL synthesizer and a high efficiency power amplifier to drive a loop antenna.
A special circuit design and an unique power amplifier design are used to save
current consumption and therefore to save battery life. Additional features like
a power down mode, a low power detect, a selectable crystal oscillator fre-
quency and a divided clock output are implemented. The IC can be used for
both ASK and FSK modulation.
1.2 Applications
- Keyless entry systems
- Remote control systems
- Alarm systems
- Communication systems
1.3 Features
- fully integrated frequency synthesizer
- VCO without external components
- ASK and FSK modulation
- switchable frequency range 433-435 MHz / 868-870 MHz
- high efficiency power amplifier (typically 5 dBm / 2 dBm)
- low supply current (typically 7 mA)
- voltage supply range 2.1 - 4 V
- temperature range -40°C ... 125°C
- power down mode
- low voltage sensor
- selectable crystal oscillator 6.78 MHz / 13.56 MHz
- programmable divided clock output for µC
- low external component count
Wireless Components
1-2
Specification, May 2012
5 Page 
TDK 5100
8 CLKOUT
VS
300 Ω
8
Clock output to supply an external device.
An external pull-up resistor has to be added
in accordance to the driving requirements of
the external device.
A clock frequency of 3.39 MHz is selected
by a logic low at CLKDIV input (pin9).
A clock frequency of 847.5 kHz is selected
by a logic high at CLKDIV input (pin9).
9 CLKDIV
This pin is used to select the desired clock
VS +1.2 V
VS
division rate for the CLKOUT signal.
A logic low (CLKDIV < 0.2 V) applied to this
5 μA pin selects the 3.39 MHz output signal at
60 kΩ
CLKOUT (pin 8).
9 A logic high (CLKDIV open) applied to this
60 kΩ
+0.8 V pin selects the 847.5 kHz output signal at
CLKOUT (pin 8).
10 COSC
VS
6 kΩ
VS
100 μA
10
This pin is connected to the reference oscil-
lator circuit.
The reference oscillator is working as a neg-
ative impedance converter. It presents a
negative resistance in series to an induc-
tance at the COSC pin.
11 FSKOUT
12 FSKGND
VS VS
200 µA
1.5 kΩ
11
12
This pin is connected to a switch to FSK-
GND (pin 12).
The switch is closed when the signal at
FSKDTA (pin 7) is in a logic low state.
The switch is open when the signal at
FSKDTA (pin 7) is in a logic high state.
FSKOUT can switch an additional capacitor
to the reference crystal network to pull the
crystal frequency by an amount resulting in
the desired FSK frequency shift of the trans-
mitter output frequency.
Ground connection for FSK modulation out-
put FSKOUT.
Wireless Components
2-5
Specification, May 2012
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TDK5100.PDF ] | |
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