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PDF APW7004 Data sheet ( Hoja de datos )
| Número de pieza | APW7004 | |
| Descripción | Synchronous-Rectifier PWM Controller for Pentium II Microprocessor | |
| Fabricantes | Anpec Electronics Coropration | |
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APW7004
Synchronous-Rectifier PWM Controller for PentiumTM II Microprocessor
Features
• Simple Single-Loop Control Design-Voltage-
Mode PWM Control
• Fast Transient Response
• High-Bandwidth Error Amplifier
• 5-Bit Digital-to-Analog Output Voltage Selec-
tion
• Wide Range from1.3VDC to 3.5VDC
• 0.1V Binary Steps from 2.1VDC to 3.5VDC
.05V Binary Steps from 1.3VDC to 2.05 VDC
• VID0-4 Input Pins with Pull High Resistors Built
in
• Power-Good Output Voltage Monitor, PGOOD
Pin with an Open Collector Configuration
• Over-Voltage and Over-Current Fault Monitors
•
Uses
MOSFET’s
R
DS(ON)
as
Current
Sensing,
No Extra Element Required
• Programmable Switching Frequency Setting
• 200kHz Free-Running Oscillator
Applications
• Power Supply for Pentium TM, Pentium ProTM,
Pentium TM II,PowerPC TM, K6 TM , 6´86TM and
AlphaTM Microprocessors
• High-Power 5V to 3.xV (or below) DC-DC Regu-
lators
• Low-Voltage Distributed Power Supplies
6´ 86TM is a trademark of Cyrix Corporation
AlphaTM is a trademark of Digital Equipment
Corporation
K6 TM is a trademark of Advanced Micro Devices,
Inc.
Pentium TM is a trademark of Intel Corpora-
tion
PowerPC TM is a trademark of IBM
General Description
The APW7004 provides a complete control and mul-
tiple protection for a DC-DC converter optimized for
high performance microprocessor applications. It is
designed to drive two N-Channel MOSFETs in a syn-
chronous-rectified buck topology. The APW7004 in-
tegrates output voltage control, output voltage
programming, monitoring and protection functions into
a single chip IC.
The APW7004 includes a 5-bit digital-to-analog con-
verter (DAC) that provides a easily adjustable and
precisely output voltage from 2.1VDC to 3.5VDC in 0.
1 increments and from 1.3 VDC to 2.05 VDC in 0.
05V increments. Any selected output voltage can be
maintained within ±1% accuracy over temperature
and line voltage variations.
With a 200kHz free-running triangle-wave oscillator
and a error amplifier featuring a 15MHz unity-gain
bandwidth and 6V/us slew rate inside the chip,
APW7004 can implement a simple, single feedback
loop, voltage-mode control topology with high tran-
sient performance.
The APW7004 also features with multiple protections
against over-current and over-voltage conditions by
inhibiting PWM operation. The APW7004 uses the
RDS(ON) of the upper MOSFET as the current sensing
element which eliminates the demend for an extra
component. The APW7004 also monitors the output
voltage using a comparator with hysteresis that tracks
the DAC output and issues a Power Good signal once
the output is within ±10%.
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
1
www.anpec.com.tw
1 page  
APW7004
Electrical Characteristics Cont.
PGOOD (PIin 12)
OVP (pin 19)
PGOOD is an open collector output used to indicate
the status of the converter output voltage. This pin is
pulled low when the converter output is not within
±10% of the DACOUT reference voltage. The
PGOOD pin is floating when no CPU exists.
PHASE (pin 13)
Connect the PHASE pin to the source of the upper
MOSFET. This pin is used to monitor the voltage
drop across the upper MOSFET for over-current
protection.
UGATE (pin 14)
OVP pin reports the event of an over-voltage condi-
tion . Converter output rising 15% more than the DAC-
set voltage triggers a high output on this pin with a
typical 30mA sourcing capability which can be used
to drive an external device and disables PWM gate
drive circuitry.
RT (pin 20)
RT pin provides oscillator switching frequency
adujstment. By connecting a resistor (RT) from this
pin to GND, the nominal 200kHz switching frequency
is increased. Conversely. connecting a pull-up re-
sistor
(R )
T
from
this
pin
to
V
CC
reduces
the
switching
frequency.
Connect UGATE to the upper MOSFET gate. This
pin enables the gate drive signal to drive the upper
MOSFET .
BOOT (pin 15)
BOOT pin provides bias voltage to the upper
MOSFET gate driver. A bootstrap circuit could be
used to pump a BOOT voltage for enforcing the driv-
ing capability of the gate driver and improving the
performance of the upper MOSFET.
PGND(pin 16)
PGND pin provides the power ground connection.
Connect this pin to the source of the lower MOSFET.
LGATE (pin 17)
Connect LGATE to the lower MOSFET gate. This pin
enables the gate drive signal to drive the lower
MOSFET.
VCC (pin 18)
Connect VCC to 12V voltage supply. This pin sup-
plies the bias for the chip.
Copyright ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
5
www.anpec.com.tw
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet APW7004.PDF ] | |
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