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Número de pieza | IN74AC74 | |
Descripción | Dual D-Type Flip-Flop | |
Fabricantes | IK Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de IN74AC74 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
No Preview Available ! TECHNICAL DATA
Dual D Flip-Flop with Set and Reset
High-Speed Silicon-Gate CMOS
IN74AC74
The IN74AC74 is identical in pinout to the LS/ALS74, HC/HCT74.
The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALS outputs.
This device consists of two D flip-flops with individual Set, Reset,
and Clock inputs. Information at a D-input is transferred to the
corresponding Q output on the next positive going edge of the clock input.
Both Q and Q outputs are available from each flip-flop. The Set and Reset
inputs are asynchronous.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74AC74N Plastic
IN74AC74D SOIC
TA = -40° to 85° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
www.datasheetPP4IINNu71.4=c=GVoNCDmC
FUNCTION TABLE
Inputs
Outputs
Set Reset Clock Data Q Q
LH X XHL
HL X XLH
L L X X H* H*
HH
HHL
HH
LLH
H H L X No Change
H H H X No Change
HH
X No Change
*Both outputs will remain high as long as Set
and Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
X = don’t care
1
1 page IN74AC74
Figure 1. Switching Waveform
Figure 2. Switching Waveform
Figure 3. Switching Waveform
EXPANDED LOGIC DIAGRAM
5
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet IN74AC74.PDF ] |
Número de pieza | Descripción | Fabricantes |
IN74AC74 | Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS | ETC |
IN74AC74 | Dual D-Type Flip-Flop | IK Semiconductor |
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