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Datasheet PLL602-04 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | Category |
| 1 | PLL602-04 | Low Phase Noise CMOS XO m Preliminary for proposal PLL602-04 o c . Low Phase Noise CMOS XO (96MHz to 200MHz) U t4 e FEATURES PIN CONFIGURATION e h XO for the 96MHz to 200MHz • Low phase noise S range (-125 ta dBc at 10kHz offset). • CMOS a output. • 12 to .D25MHz crystal input. • Integrated crystal load capacitor: |  PhaseLink | cmos |
PLL Datasheet ( Hoja de datos ) - resultados coincidentes |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 1 | PLL0210A | PHASE LOCKED LOOP (
D a t a S h e e t
:
w w w . D a t a S h e e t 4 U . c o m
)
PLL0210A
9939 Via Pasar • San Diego, CA 92126 TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A2
PHASE NOISE (1 Hz BW, typical)
FEATURES • Frequency Range: 200 - 230 MHz • Step Size: 100 KHz • PLL - Style Packa |  Z-Communications |  |
| 2 | PLL0930A | PHASE LOCKED LOOP (
D a t a S h e e t
:
w w w . D a t a S h e e t 4 U . c o m
)
PLL0930A
9939 Via Pasar • San Diego, CA 92126 TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A2
PHASE NOISE (1 Hz BW, typical)
FEATURES • Frequency Range: 900 - 960 MHz • Step Size: 100 KHz • PLL - Style Packa | Z-Communications | |
| 3 | PLL1000A | PHASE LOCKED LOOP PLL1000A
9939 Via Pasar • San Diego, CA 92126 TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A
PHASE NOISE (1 Hz BW, typical)
FEATURES • Frequency Range: 988 - 1028 MHz • Step Size: 1000 KHz • PLL - Style Package APPLICATIONS • Basestations • Mobile R | Z-Communications | |
| 4 | PLL102-03 | Low Skew Output Buffer PLL102-03
Low Skew Output Buffer
FEATURES
Frequency range 75 ~ 180MHz. Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation). • Zero input - output delay. • Less than 700 ps device - device skew. • Less than 250 |  PhaseLink Corporation | |
| 5 | PLL102-04 | Low Skew Output Buffer PLL102-04
Low Skew Output Buffer
FEATURES
Frequency range 50 ~ 120MHz. Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation). • Zero input - output delay. • Less than 700 ps device - device skew. • Less than 250 | PhaseLink Corporation | |
| 6 | PLL102-05 | Low Skew Output Buffer PLL102-05
Low Skew Output Buffer
FEATURES
Frequency range 25 ~ 60MHz. Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation). • Zero input - output delay. • Less than 700 ps device - device skew. • Less than 250 | PhaseLink Corporation | |
| 7 | PLL102-10 | Low Skew Output Buffer PLL102-10
Low Skew Output Buffer
FEATURES
Frequency range 50 ~ 120MHz. Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to outputs. • Zero input - output delay. • Less than 700 ps device - device skew. • Less than 250 ps skew between outputs. www.Data | PhaseLink Corporation | |
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