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PDF AM29PL320D Data sheet ( Hoja de datos )
| Número de pieza | AM29PL320D | |
| Descripción | 32 Megabit (2 M x 16-Bit/1 M x 32-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory | |
| Fabricantes | SPANSION | |
| Logotipo |  |
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Am29PL320D.comData Sheet
eet4U RETIRED
h PRODUCT
ataSThis product has been retired and is not recommended for designs. For new and current designs,
.DS29GL032M supersedes Am29PL320D and is the factory-recommended migration path. Please refer
wto the S29GL032M datasheet for specifications and ordering information. Availability of this docu-
wment is retained for reference and historical purposes only.
w omJune 2005
.cThe following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that
Uoriginally developed the specification, these products will be offered to customers of both AMD and
t4Fujitsu.
Continuity of Specifications
eThere is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
edocument revision summary, where supported. Future routine revisions will occur when appro-
hpriate, and changes will be noted in a revision summary.
For More Information
SPlease contact your local AMD or Fujitsu sales office for additional information about Spansion
tamemory solutions.
www.Da www.DataSheet4U.comPublication Number 24075 Revision C Amendment +3 Issue Date June 13, 2005
1 page  
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Standard Products .................................................................... 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Am29PL320D Device Bus Operations ................................9
Word/Double Word Configuration ............................................. 9
Requirements for Reading Array Data ..................................... 9
Read Mode ............................................................................... 9
Random Read (Non-Page Mode Read) ............................................9
Page Mode Read .................................................................... 10
Table 2. Double Word Mode ...........................................................10
Table 3. Word Mode ........................................................................10
Writing Commands/Command Sequences ............................ 11
Accelerated Program Operation ......................................................11
Program and Erase Operation Status .................................... 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 11
Output Disable Mode .............................................................. 11
Table 4. Sector Address Table, Top Boot (Am29PL320DT) ...........12
Table 5. SecSi™ Sector Addresses for Top Boot Devices .............12
Table 6. Sector Address Table, Bottom Boot (Am29PL320DB) ......13
Table 7. SecSi™ Sector Addresses for
Bottom Boot Devices .......................................................................13
Autoselect Mode ..................................................................... 14
Table 8. Am29PL320D Autoselect Codes (High Voltage Method) ..14
Sector Protection/Unprotection ............................................... 14
Common Flash Memory Interface (CFI) . . . . . . . 15
Table 9. CFI Query Identification String ..........................................15
Table 10. System Interface String ...................................................16
Table 11. Device Geometry Definition ............................................16
Table 12. Primary Vendor-Specific Extended Query ......................17
SecSi™ (Secured Silicon) Sector Flash Memory Region ....... 18
Factory Locked: SecSi Sector Programmed and
Protected At the Factory .................................................................18
Customer Lockable: SecSi Sector NOT Programmed or Locked
At the Factory .................................................................................18
Figure 1. SecSi Sector Protect Verify.............................................. 19
Write Protect (WP#) ................................................................ 19
Hardware Data Protection ...................................................... 19
Low VCC Write Inhibit ......................................................................19
Write Pulse “Glitch” Protection ........................................................19
Logical Inhibit ..................................................................................19
Power-Up Write Inhibit ....................................................................19
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 19
Reading Array Data ................................................................ 19
Reset Command ..................................................................... 20
Autoselect Command Sequence ............................................ 20
Enter SecSi™ Sector/Exit SecSi Sector
Command Sequence .............................................................. 20
Word/Double Word Program Command Sequence ............... 20
Unlock Bypass Command Sequence ..............................................21
Figure 2. Program Operation .......................................................... 21
Chip Erase Command Sequence ........................................... 22
Sector Erase Command Sequence ........................................ 22
Erase Suspend/Erase Resume Commands ........................... 22
Figure 3. Erase Operation.............................................................. 23
Temporary Sector Unprotect Enable/Disable
Command Sequence .............................................................. 24
Figure 4. Temporary Sector Unprotect Algorithm .......................... 24
Command Definitions ............................................................. 25
Table 13. Command Definitions (Double Word Mode) .................. 25
Table 14. Command Definitions (Word Mode) ............................... 26
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 27
DQ7: Data# Polling ................................................................. 27
Figure 5. Data# Polling Algorithm .................................................. 27
DQ6: Toggle Bit ...................................................................... 28
DQ2: Toggle Bit ...................................................................... 28
Reading Toggle Bits DQ6/DQ2 ............................................... 28
DQ5: Exceeded Timing Limits ................................................ 28
Figure 6. Toggle Bit Algorithm........................................................ 29
DQ3: Sector Erase Timer ....................................................... 29
Table 15. Write Operation Status ................................................... 30
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 31
Figure 7. Maximum Negative Overshoot Waveform ...................... 31
Figure 8. Maximum Positive Overshoot Waveform........................ 31
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 31
Commercial (C) Devices ......................................................... 31
Industrial (I) Devices ............................................................... 31
VCC Supply Voltages .............................................................. 31
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 32
CMOS Compatible .................................................................. 32
Zero Power Flash ................................................................... 33
Figure 9. ICC1 Current vs. Time (Showing Active and Automatic Sleep
Currents) ........................................................................................ 33
Figure 10. Typical ICC1 vs. Frequency ........................................... 33
Figure 11. Test Setup..................................................................... 34
Table 16. Test Specifications ......................................................... 34
Key to Switching Waveforms. . . . . . . . . . . . . . . . 34
Figure 12. Input Waveforms and Measurement Levels ................. 34
Read Operations .................................................................... 35
Figure 13. Conventional Read Operations Timings ....................... 36
Figure 14. Page Read Timings ...................................................... 36
Double Word/Word Configuration (WORD#) ........................ 37
Figure 15. WORD# Timings for Read Operations.......................... 37
Figure 16. WORD# Timings for Write Operations.......................... 37
Program/Erase Operations .................................................... 38
Figure 17. Program Operation Timings.......................................... 39
Figure 18. AC Waveforms for Chip/Sector Erase Operations........ 40
Figure 19. Data# Polling Timings (During Embedded Algorithms). 40
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 41
Figure 21. DQ2 vs. DQ6 for Erase and
Erase Suspend Operations ............................................................ 41
Alternate CE# Controlled
Erase/Program Operations ..................................................... 42
Figure 22. Alternate CE# Controlled Write Operation Timings ...... 43
Erase and Programming Performance . . . . . . . 44
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
BGA Package Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 46
FBF084—84-Ball Fine Pitch Ball Grid Array (FBGA) 11 x 12 mm ..... 46
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 47
Revision A (March 7, 2001) .................................................... 47
June 13, 2005
Am29PL320D
3
5 Page 
DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register it-
self does not occupy any addressable memory
location. The register is composed of latches that store
the commands, along with the address and data infor-
mation needed to execute the command. The contents
of the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function
of the device. Table 1 lists the device bus operations,
the inputs and control levels they require, and the re-
sulting output. The following subsections describe
each of these operations in further detail.
Table 1. Am29PL320D Device Bus Operations
Operation
Read
Write
Standby
Output Disable
CE#
L
L
VCC ±
0.3 V
L
OE#
L
H
X
H
WE#
H
L
X
H
WP#
X
X
X
X
Addresses
(Note 1)
AIN
AIN
X
X
DQ7–
DQ0
DOUT
DIN
High-Z
WORD#
= VIH
DOUT
DIN
DQ31–DQ8
WORD#
= VIL
DQ30–DQ16 = High-Z,
DQ31 = A-1
High-Z
High-Z
High-Z High-Z
High-Z
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 12.0 ± 0.5 V, X = Don’t Care, AIN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Addresses are A19–A0 in double word mode (WORD# = VIH), A19–A-1 in word mode (WORD# = VIL).
2. The sector protect and sector unprotect functions must be implemented via programming equipment. See the “Sector
Protection/Unprotection” section.
Word/Double Word Configuration
The WORD# input controls whether the device data
I/Os DQ31–DQ0 operate in the word or double word
configuration. If the WORD# input is set at VIH, the de-
vice is in double word configuration; DQ31–DQ0 are
active and controlled by CE# and OE#.
If the WORD# input is set at logic ‘0’, the device is in
word configuration, and only data I/Os DQ15–DQ0 are
active and controlled by CE# and OE#. The data I/Os
DQ30–DQ16 are tri-stated, and the DQ31 input is
used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# inputs to VIL. CE# is the power
control and selects the device. OE# is the output control
and gates array data to the output inputs. WE# should
remain at VIH. The WORD# input determines whether
the device outputs array data in words or bytes.
The internal state machine is set for reading array data
upon device power-up. This ensures that no spurious
alteration of the memory content occurs during the
power transition. No command is necessary in this
mode to obtain array data. Standard microprocessor
read cycles that assert valid addresses on the device
address inputs produce valid data on the device data
outputs. The device remains enabled for read access
until the command register contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read Operations table for timing specifica-
tions and to Figure 13 for the timing diagram. ICC1 in
the DC Characteristics table represents the active cur-
rent specification for reading array data.
Read Mode
Random Read (Non-Page Mode Read)
The device has two control functions which must be
satisfied in order to obtain data at the outputs. CE# is
the power control and should be used for device selec-
tion. OE# is the output control and should be used to
gate data to the output inputs if the device is selected.
Address access time (tACC) is equal to the delay from
stable addresses to valid output data. The chip enable
access time (tCE) is the delay from the stable ad-
dresses and stable CE# to valid data at the output
inputs. The output enable access time is the delay
from the falling edge of OE# to valid data at the output
inputs (assuming the addresses have been stable for
at least tACC–tOE time).
June 13, 2005
Am29PL320D
9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AM29PL320D.PDF ] | |
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