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PDF AMD27C64 Data sheet ( Hoja de datos )
| Número de pieza | AMD27C64 | |
| Descripción | 64 Kilobit (8192 x 8-Bit) CMOS EPROM | |
| Fabricantes | Advanced Micro Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AMD27C64 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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FINAL
Am27C64
64 Kilobit (8,192 x 8-Bit) CMOS EPROM
Advanced
Micro
Devices
DISTINCTIVE CHARACTERISTICS
s Fast access time
— 45 ns
s Low power consumption
— 20 µA typical CMOS standby current
s JEDEC-approved pinout
s Single +5 V power supply
s ±10% power supply tolerance available
s 100% FlashriteTM programming
— Typical programming time of 1 second
s Latch-up protected to 100 mA from –1 V to
VCC + 1 V
s High noise immunity
s Versatile features for simple interfacing
— Both CMOS and TTL input/output
compatibility
— Two line control functions
s Standard 28-pin DIP, PDIP, and 32-pin PLCC
packages
GENERAL DESCRIPTION
The Am27C64 is a 64-Kbit ultraviolet erasable program- controls, thus eliminating bus contention in a multiple
mable read-only memory. It is organized as 8K words by bus microprocessor system.
8 bits per word, operates from a single +5 V supply, has AMD’s CMOS process technology provides high speed,
a static standby mode, and features fast single address low power, and high noise immunity. Typical power con-
location programming. Products are available in win-
sumption is only 80 mW in active mode, and 100 µW in
dtimoweepdrocgerraammmicabDlIeP(OpaTcPk)aPgDesIPa, sanwdePllLaCsCpplaasctDkicaagotaensSe.heet4sUta.cnodmby mode.
All signals are TTL levels, including programming sig-
Typically, any byte can be accessed in less than 45 ns, nals. Bit locations may be programmed singly, in blocks,
allowing operation with high-performance microproces- or at random. The Am27C64 supports AMD’s Flashrite
sors without any WAIT states. The Am27C64 offers
separate Output Enable (OE) and Chip Enable (CE)
programming algorithm (100 µs pulses) resulting in a
typical programming time of 1 second.
BLOCK DIAGRAM
OE
CE
PGM
VCC
VSS
VPP
Output Enable
Chip Enable
and
Prog Logic
Data Outputs
DQ0–DQ7
Output
Buffers
Y
Decoder
Y
Gating
DataShee
A0–A12
Address
Inputs
X
Decoder
65,538
Bit Cell
Matrix
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2-10
DataSheet4 U .com
11419D-1
Publication# 11419 Rev. D Amendment /0
Issue Date: May 1995
1 page  
www.DataSheet4U.com
et4U.com
AMD
FUNCTIONAL DESCRIPTION
Erasing the Am27C64
In order to clear all locations of their programmed con-
tents, it is necessary to expose the Am27C64 to an
PGM input with VPP = 12.75 V ± 0.25 V and CE Low will
program that Am27C64. A high-level CE input inhibits
the other Am27C64 devices from being programmed.
ultraviolet light source. A dosage of 15 W seconds/cm2is Program Verify
required to completely erase an Am27C64. This dosage
can be obtained by exposure to an ultraviolet lamp—
wavelength of 2537 A°—with intensity of 12,000 µW/cm2
for 15 to 20 minutes. The Am27C64 should be directly
under and about one inch from the source and all filters
should be removed from the UV light source prior
A verify should be performed on the programmed bits to
determine that they were correctly programmed. The
verify should be performed with OE and CE at VIL , PGM
at VIH, and VPP between 12.5 V and 13.0 V.
Auto Select Mode
to erasure.
The auto select mode allows the reading out of a binary
It is important to note that the Am27C64 and similar code from an EPROM that will identify its manufacturer
devices will erase with light sources having wavelengths
shorter than 4000 A°. Although erasure times will be
much longer than with UV sources at 2537 A°, exposure
and type. This mode is intended for use by programming
equipment for the purpose of automatically matching
the device to be programmed with its corresponding
to fluorescent light and sunlight will eventually erase the
Am27C64 and exposure to them should be prevented to
realize maximum system reliability. If used in such an
programming algorithm. This mode is functional in the
25°C ± 5°C ambient temperature range that is required
when programming the Am27C64.
environment, the package window should be covered To activate this mode, the programming equipment
by an opaque label or substance.
must force 12.0 V ± 0.5 V on address line A9 of the
Programming the Am27C64
Upon delivery or after each erasure the Am27C64
has all 65,536 bits in the “ONE” or HIGH state. “ZEROs”
are loaded into the Am27C64 through the procedure
of programming.
Am27C64. Two identifier bytes may then be sequenced
from the device outputs by toggling address line A0 from
VIL to VIH. All other address lines must be held at VIL dur-
ing auto select mode.
Byte 0 (A0 = VIL) represents the manufacturer code, and
The
0.25
programming
V is applied to
mode is entered
the VPP pin, CE is
awthVeILna1n2d.P7D5GaMtVaSi±sheet4btTUhyae.tbcesloee1m.tAw(Alol0idid=eenVntItiHfifi)eie,rrtshbfeoyrtdemesvaaincreuefcagocivdteuenr.eiFrnaotnrhdtehdeMeoAvdimcee2S7coCedl6ee4cs,t
at VIL.
will possess odd parity, with the MSB (DQ7) defined as
For programming, the data to be programmed is applied the parity bit.
8 bits in parallel to the data output pins.
The Flashrite algorithm reduces programming time by
using 100 µs programming pulses and by giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If
the data does not verify, additional pulses are given until
it verifies or the maximum is reached. This process is
repeated while sequencing through each address of the
Am27C64. This part of the algorithm is done at
VCC = 6.25 V to assure that each EPROM bit is pro-
grammed to a sufficiently high threshold voltage. After
the final address is completed, the entire EPROM mem-
Read Mode
The Am27C64 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to
the output pins, independent of device selection. As-
suming that addresses are stable, address access time
(tACC) is equal to the delay from CE to output (tCE). Data
is available at the outputs tOE after the falling edge of
OE, assuming that CE has been LOW and addresses
have been stable for at least tACC–tOE.
ory is verified at VCC = VPP = 5.25 V.
Standby Mode
Please refer to Section 6 for programming flow chart
and characteristics.
Program Inhibit
Programming of multiple Am27C64 in parallel with dif-
ferent data is also easily accomplished. Except for CE,
all like inputs of the parallel Am27C64 may be common.
A TTL low-level program pulse applied to an Am27C64
The Am27C64 has a CMOS standby mode which re-
duces the maximum VCC current to 100 µA. It is placed in
CMOS-standby when CE is at VCC ± 0.3 V. The
Am27C64 also has a TTL-standby mode which reduces
the maximum VCC current to 1.0 mA. It is placed in
TTL-standby when CE is at VIH. When in standby mode,
the outputs are in a high-impedance state, independent
of the OE input.
DataShee
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Am27C64
5 Page 
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AMD
KEY TO SWITCHING WAVEFORMS
et4U.com
WAVEFORM
INPUTS
OUTPUTS
Must Be
Steady
Will Be
Steady
May
Change
from H to L
Will Be
Changing
from H to L
May
Change
from L to H
Will Be
Changing
from L to H
Don’t Care,
Any Change
Permitted
Changing
State
Unknown
SWITCHING WAVEFORMS
Does Not
Apply
Center
Line is High
Impedence
“Off” State
KS000010
2.4
Addresses
0.45
2.0 DataSAhdederet4ssUe.scoVmalid
0.8
2.0
0.8
CE
tCE
OE
Output
High Z
tACC
(Note 1)
tOE
tOH
Valid Output
Notes:
1. OE may be delayed up to tACC–tOE after the falling edge of the addresses without impact on tACC.
2. tDF is specified from OE or CE, whichever occurs first.
tDF
(Note 2)
High Z
11419D-9
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Am27C64
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet AMD27C64.PDF ] | |
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