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24AA025 PDF даташит

Спецификация 24AA025 изготовлена ​​​​«Microchip Technology» и имеет функцию, называемую «(24AA024 / 24AA025) 2K I2C Serial EEPROM».

Детали детали

Номер произв 24AA025
Описание (24AA024 / 24AA025) 2K I2C Serial EEPROM
Производители Microchip Technology
логотип Microchip Technology логотип 

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24AA025 Даташит, Описание, Даташиты
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24AA024/24LC024/24AA025/24LC025
2K I2CSerial EEPROM
Device Selection Table
Part
Number
VCC Range
Max
Clock
Temp. Write
Range Protect
24AA024 1.8V - 5.5V 400 KHz(1)
24AA025 1.8V - 5.5V 400 KHz(1)
I
I
Yes
No
24LC024 2.5V - 5.5V 400 KHz I
Yes
24LC025 2.5V - 5.5V 400 KHz I
No
Note 1: 100 KHz for VCC < 2.5V
Features
• Single supply with operation from 1.8V to 5.5V
• Low-power CMOS technology
- 1 mA active current typical
- 1 µA standby current typical at 5.5V
• Organized as a single block of 256 bytes (256 x 8)
• Hardware write protection for entire array
(24XX024)
• 2-wire serial interface bus, I2C™ compatible
• 100 kHz and 400 kHz clock compatibility
• Page write buffer for up to 16 bytes
• Self-timed write cycle (including auto-erase)
• 10 ms max. write cycle time
• Address lines allow up to eight devices on bus
• 1,000,000 erase/write cycles
• ESD protection > 4,000V
• Data retention > 200 years
• 8-pin PDIP, SOIC, TSSOP and MSOP packages
• Available for extended temperature ranges
- Industrial (I): -40°C to +85°C
Pin Function Table
Name
VSS
SDA
SCL
VCC
A0, A1, A2
WP
Function
Ground
Serial Data
Serial Clock
1.8V to 5.5V Power Supply
Chip Selects
Hardware Write-Protect (24LC024)
Description
The Microchip Technology Inc. 24AA024/24LC024/
24AA025/24LC025 is a 2 Kbit Serial Electrically
Erasable PROM with a voltage range of 1.8V to 5.5V.
The device is organized as a single block of 256 x 8-bit
memory with a 2-wire serial interface. Low current
design permits operation with typical standby and
active currents of only 1 µA and 1 mA, respectively.
The device has a page write capability for up to 16
bytes of data. Functional address lines allow the
connection of up to eight 24AA024/24LC024/
24AA025/24LC025 devices on the same bus for up to
16K bits of contiguous EEPROM memory. The device
is available in the standard 8-pin PDIP, 8-pin SOIC
(150 mil), TSSOP and MSOP packages.
Package Types
PDIP/SOIC
A0 1
8 VCC
A1 2
A2 3
7 WP*
6 SCL
VSS 4
TSSOP/MSOP
A0
A1
A2
VSS
1
2
3
4
5 SDA
8 VCC
7 WP*
6 SCL
5 SDA
Block Diagram
A0 A1 A2
WP*
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
SDA SCL
VCC
VSS
EEPROM
Array
Write-Protect
Circuitry
YDEC
Sense Amp.
R/W Control
Note:
*WP pin available only on 24XX024. This pin
has no internal connection on 24XX025.
2004 Microchip Technology Inc.
DS21210G-page 1









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24AA025 Даташит, Описание, Даташиты
24AA024/24LC024/24AA025/24LC025
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (†)
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1: DC CHARACTERISTICS
All parameters apply across the
specified operating ranges unless
otherwise noted.
VCC = 1.8V to 5.5V
Industrial (I): TA = -40°C to +85°C
Parameter
Symbol Min.
Max. Units
Conditions
SCL and SDA pins:
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt Trigger inputs
Low-level output voltage
VIH
VIL
VHYS
VOL
0.7 VCC
0.05 VCC
0.3 VCC
0.40
Input leakage current
Output leakage current
Pin capacitance (all inputs/outputs)
ILI
ILO
CIN, COUT
±1
±1
10
Operating current
Standby current
ICC Read
ICC Write
ICCS
1
3
1
Note: This parameter is periodically sampled and not 100% tested.
V—
V—
V (Note)
V IOL = 3.0 mA, VCC = 4.5V
IOL = 2.1 mA, VCC = 2.5V
µA VIN = 0.1V to 5.5V, WP = VSS
µA VOUT = 0.1V to 5.5V
pF VCC = 5.0V (Note)
TA = 25°C, f = 1 MHz
mA VCC = 5.5V, SCL = 400 kHz
mA VCC = 5.5V
µA VCC = 5.5V, SDA = SCL = VCC
WP = VSS, A0, A1, A2 = VSS
DS21210G-page 2
2004 Microchip Technology Inc.









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24AA025 Даташит, Описание, Даташиты
24AA024/24LC024/24AA025/24LC025
TABLE 1-2: AC CHARACTERISTICS
All parameters apply across the specified
operating ranges unless otherwise noted.
VCC = 1.8V to 5.5V
Industrial (I):
TA = -40°C to +85°C
Parameter
Symbol
STD MODE
Vcc = 2.5V - 5.5V
FAST MODE Units
Remarks
Min. Max. Min. Max.
Clock frequency
FCLK
— 100 — 400 kHz —
Clock high time
THIGH
4000
600
— ns —
Clock low time
TLOW
4700
1300
ns —
SDA and SCL rise time
TR
— 1000 —
300 ns (Note 1)
SDA and SCL fall time
TF
— 300 — 300 ns (Note 1)
Start condition hold time
THD:STA 4000
600
— ns After this period the first
clock pulse is generated
Start condition setup time TSU:STA 4700
600
— ns Only relevant for repeated
Start condition
Data input hold time
THD:DAT
0
0
— ns (Note 2)
Data input setup time
TSU:DAT 250 — 100 — ns —
Stop condition setup time TSU:STO 4000
600
— ns —
Output valid from clock
TAA
— 3500 —
900 ns (Note 2)
Bus free time
TBUF
4700 — 1300 — ns Time the bus must be free
before a new transmission
can start
Output fall time from VIH
minimum to VIL maximum
TOF
250 20 +0.1 250
ns (Note 1), CB 100 pF
CB
Input filter spike suppression TSP
(SDA and SCL pins)
— 50 — 50 ns (Note 3)
Write-cycle time
TWC — 10 — 10 ms Byte or Page mode
Endurance
1M — 1M — cycles 25°C, (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be downloaded at
www.microchip.com.
FIGURE 1-1:
BUS TIMING DATA
SCL
SDA
IN
SDA
OUT
TF
TSU:STA
TLOW
THD:STA
TSP
THIGH
THD:DAT
TAA
TR
TSU:DAT
TSU:STO
TBUF
2004 Microchip Technology Inc.
DS21210G-page 3










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