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EPM7256B PDF даташит

Спецификация EPM7256B изготовлена ​​​​«Altera Corporation» и имеет функцию, называемую «(EPM7000B) Programmable Logic Device».

Детали детали

Номер произв EPM7256B
Описание (EPM7000B) Programmable Logic Device
Производители Altera Corporation
логотип Altera Corporation логотип 

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EPM7256B Даташит, Описание, Даташиты
www.DataSheet4U.com
September 2003, ver. 3.4
®
MAX 7000B
Programmable Logic
Device
Data Sheet
Features...
f
High-performance 2.5-V CMOS EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX®) architecture (see Table 1)
– Pin-compatible with the popular 5.0-V MAX 7000S and 3.3-V
MAX 7000A device families
– High-density PLDs ranging from 600 to 10,000 usable gates
– 3.5-ns pin-to-pin logic delays with counter frequencies in excess
of 303.0 MHz
Advanced 2.5-V in-system programmability (ISP)
– Programs through the built-in IEEE Std. 1149.1 Joint Test Action
Group (JTAG) interface with advanced pin-locking capability
– Enhanced ISP algorithm for faster programming
– ISP_Done bit to ensure complete programming
– Pull-up resistor on I/O pins during in-system programming
– ISP circuitry compliant with IEEE Std. 1532
For information on in-system programmable 5.0-V MAX 7000S or 3.3-V
MAX 7000A devices, see the MAX 7000 Programmable Logic Device Family
Data Sheet or the MAX 7000A Programmable Logic Device Family Data Sheet.
Table 1. MAX 7000B Device Features
Feature
Usable gates
Macrocells
Logic array blocks
Maximum user I/O
pins
tPD (ns)
tSU (ns)
tFSU (ns)
tCO1 (ns)
fCNT (MHz)
EPM7032B
600
32
2
36
3.5
2.1
1.0
2.4
303.0
EPM7064B
1,250
64
4
68
3.5
2.1
1.0
2.4
303.0
EPM7128B
2,500
128
8
100
4.0
2.5
1.0
2.8
243.9
EPM7256B
5,000
256
16
164
5.0
3.3
1.0
3.3
188.7
EPM7512B
10,000
512
32
212
5.5
3.6
1.0
3.7
163.9
Altera Corporation
DS-MAX7000B-3.4
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EPM7256B Даташит, Описание, Даташиты
MAX 7000B Programmable Logic Device Data Sheet
...and More
Features
System-level features
– MultiVoltTM I/O interface enabling device core to run at 2.5 V,
while I/O pins are compatible with 3.3-V, 2.5-V, and 1.8-V logic
levels
– Programmable power-saving mode for 50% or greater power
reduction in each macrocell
– Fast input setup times provided by a dedicated path from I/O
pin to macrocell registers
– Support for advanced I/O standards, including SSTL-2 and
SSTL-3, and GTL+
– Bus-hold option on I/O pins
– PCI compatible
– Bus-friendly architecture including programmable slew-rate
control
– Open-drain output option
– Programmable security bit for protection of proprietary designs
– Built-in boundary-scan test circuitry compliant with
IEEE Std. 1149.1
– Supports hot-socketing operation
– Programmable ground pins
Advanced architecture features
– Programmable interconnect array (PIA) continuous routing
structure for fast, predictable performance
– Configurable expander product-term distribution, allowing up
to 32 product terms per macrocell
– Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
– Two global clock signals with optional inversion
– Programmable power-up states for macrocell registers
– 6 to 10 pin- or logic-driven output enable signals
Advanced package options
– Pin counts ranging from 44 to 256 in a variety of thin quad flat
pack (TQFP), plastic quad flat pack (PQFP), ball-grid array
(BGA), space-saving FineLine BGATM, 0.8-mm Ultra
FineLine BGA, and plastic J-lead chip carrier (PLCC) packages
– Pin-compatibility with other MAX 7000B devices in the same
package
Advanced software support
– Software design support and automatic place-and-route
provided by Altera’s MAX+PLUS® II development system for
Windows-based PCs and Sun SPARCstation, and HP 9000
Series 700/800 workstations
2 Altera Corporation









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EPM7256B Даташит, Описание, Даташиты
General
Description
MAX 7000B Programmable Logic Device Data Sheet
– Additional design entry and simulation support provided by
EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized
modules (LPMs), Verilog HDL, VHDL, and other interfaces to
popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys,
Synplicity, and VeriBest
– Programming support with Altera’s Master Programming Unit
(MPU), MasterBlasterTM serial/universal serial bus (USB)
communications cable, and ByteBlasterMVTM parallel port
download cable, as well as programming hardware from third-
party manufacturers and any JamTM STAPL File (.jam), Jam Byte-
Code File (.jbc), or Serial Vector Format File (.svf)-capable in-
circuit tester
MAX 7000B devices are high-density, high-performance devices based on
Altera’s second-generation MAX architecture. Fabricated with advanced
CMOS technology, the EEPROM-based MAX 7000B devices operate with
a 2.5-V supply voltage and provide 600 to 10,000 usable gates, ISP,
pin-to-pin delays as fast as 3.5 ns, and counter speeds up to 303.0 MHz.
See Table 2.
Table 2. MAX 7000B Speed Grades Note (1)
Device
Speed Grade
EPM7032B
EPM7064B
EPM7128B
EPM7256B
EPM7512B
-3 -4 -5 -7 -10
v vv
v vv
v vv
vvv
vvv
Notes:
(1) Contact Altera Marketing for up-to-date information on available device speed
grades.
The MAX 7000B architecture supports 100% TTL emulation and high-
density integration of SSI, MSI, and LSI logic functions. It easily integrates
multiple devices ranging from PALs, GALs, and 22V10s to MACH and
pLSI devices. MAX 7000B devices are available in a wide range of
packages, including PLCC, BGA, FineLine BGA, 0.8-mm Ultra FineLine
BGA, PQFP, TQFP, and TQFP packages. See Table 3.
Altera Corporation
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Номер в каталогеОписаниеПроизводители
EPM7256AEProgrammable Logic DeviceAltera Corporation
Altera Corporation
EPM7256B(EPM7000B) Programmable Logic DeviceAltera Corporation
Altera Corporation
EPM7256EProgrammable Logic Device FamilyAltera Corporation
Altera Corporation
EPM7256SProgrammable Logic Device FamilyAltera Corporation
Altera Corporation

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