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CLC5955 PDF даташит

Спецификация CLC5955 изготовлена ​​​​«National Semiconductor» и имеет функцию, называемую «Broadband Monolithic A/D Converter».

Детали детали

Номер произв CLC5955
Описание Broadband Monolithic A/D Converter
Производители National Semiconductor
логотип National Semiconductor логотип 

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CLC5955 Даташит, Описание, Даташиты
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N
April 2002
CLC5955
11-bit, 55MSPS Broadband Monolithic A/D Converter
General Description
The CLC5955 is a monolithic 11-bit, 55MSPS analog-to-digital
converter. The device has been optimized for use in IF-sampled
digital receivers and other applications where high resolution,
high sampling rate, wide dynamic range, low power dissipation,
and compact size are required. The CLC5955 features differential
analog inputs, low jitter differential universal clock inputs, a low
distortion track-and-hold with 0-300MHz input bandwidth, a bandgap
voltage reference, data valid clock output, TTL compatible CMOS
(3.3V or 2.5V) programmable output logic, and a proprietary multi-
stage quantizer. The CLC5955 is fabricated on the ABIC-V 0.8
micron BiCMOS process.
The CLC5955 features a 74dBc spurious free dynamic range
(SFDR) and a 64dB signal to noise ratio (SNR). The wideband
track-and-hold allows sampling of IF signals to greater than
250MHz. The part produces two-tone, dithered, SFDR of 83dBFS
at 75MHz input frequency. The differential analog input provides
excellent common mode rejection, while the differential universal
clock inputs minimize jitter. The 48-pin TSSOP package provides
an extremely small footprint for applications where space is a
critical consideration. The CLC5955 operates from a single +5V
power supply. Operation over the industrial temperature range of
-40°C to +85°C is guaranteed. National Semiconductor tests
each part to verify compliance with the guaranteed specifications.
Features
• 55MSPS
• Wide dynamic range
SFDR: 74dBc
SFDR w/dither: 85dBFS
SNR: 64dB
• IF sampling capability
• Input bandwidth = 0-300MHz
• Low power dissipation: 640mW
• Very small package: 48-pin TSSOP
• Single +5V supply
• Data valid clock output
• Programmable output levels:
3.3V or 2.5V
Applications
• Cellular base-stations
• Digital communications
• Infrared/CCD imaging
• IF sampling
• Electro-optics
• Instrumentation
• Medical imaging
• High definition video
N ME79TG
N CLC59557
MTD
Actual Size
Clock
In
AIn T/H
ADC Block Diagram
QQQQ
Bit Align/Error Correct
DAV
IF
Input
11 ADC
Out
First IF Receiver
IF
Saw
~~
BPF
(150MHz
typ.)
DVGA
(G = 42dB)
Noise
BPF
3-bit (Gain Control)
CLC5955
11-bit
55MSPS
ADC
CLC5903
11
DAV
Dig.
Tuner/
Filter
AGC
20
Decimation/filter = 190/0.8
Output BW = 50M/190 X 0.8 = 210KHz
Single Tone Output Spectrum w/Dither
0
-10
Fin = 25.3MHZ
Fsample = 66MHz
-20
-30
-40
-50
-60
-70
-80
-90
-100
0 4 8 12 16 20 24 28 32
Frequency (MHz)
© 2002 National Semiconductor Corporation
Printed in the U.S.A.
Receiver SINAD vs. Input Amplitude
90
80
70
60
50
40
30
20
10
0
-125 -100 -75 -50 -25
Input (dBFS)
0
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CLC5955 Даташит, Описание, Даташиты
CLC5955 Electrical Characteristics (Vcc= +5V, 55MSPS; unless specified) (Tmin = -40°C, Tmax = +85°C)
PARAMETERS
CONDITIONS
TEMP
RATINGS
UNITS NOTES
MIN TYP MAX
2
RESOLUTION
DIFF. INPUT VOLTAGE RANGE
MAXIMUM CONVERSION RATE
SNR
SFDR
DYNAMIC PERFORMANCE
large-signal bandwidth
overvoltage recovery time
effective aperture delay (Ta)
aperture jitter
fin = 25MHz, Ain = -1dBFS
fin = 25MHz, Ain = -1dBFS
Full
Full
Full
+25°C
+25°C
11
2.048
55 75
60 64
65 74
Ain = -3dBFS
Ain = 1.5FS (0.01%)
+25°C
+25°C
+25°C
+25°C
300
12
-0.41
0.3
Bits
V
MSPS
dBFS
dBc
MHz
ns
ns
ps(rms)
1
1
1
1
NOISE AND DISTORTION
signal-to-noise ratio (w/o 50 harmonics)
fin = 5.0MHz
Ain = -1dBFS
fin = 25MHz
Ain = -1dBFS
fin = 75MHz
Ain = -3dBFS
fin = 150MHz
Ain = -15dBFS
fin = 250MHz
Ain = -15dBFS
spurious-free dynamic range
fin = 5.0MHz
Ain = -1dBFS
fin = 25MHz
Ain = -1dBFS
fin = 75MHz
Ain = -3dBFS
fin = 150MHz
Ain = -15dBFS
fin = 250MHz
Ain = -15dBFS
intermodulation distortion
fin1 = 149.84MHz, fin2 = 149.7MHz Ain = -10dBFS
fin1 = 249.86MHz, fin2 = 249.69MHz Ain = -10dBFS
dithered performance
spurious-free dynamic range
fin = 19MHz
Ain = -6dBFS
intermodulation distortion
fin1 = 74MHz, fin2 = 75MHz
Ain = -12dBFS
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
+25°C
+25°C
57
59
+25°C
+25°C
65
64
63
64
64
74
74
72
69
65
68
58
85
83
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
dBc
dBc
dBc
dBc
dBFS
dBFS
dBFS
dBFS
1
1
DC ACCURACY AND PERFORMANCE
differential non-linearity
fin = 5MHz, Ain = -1dBFS
Full
±0.8
LSB
integral non-linearity
fin = 5MHz, Ain = -1dBFS
Full
±2.0
LSB
offset error
Full -30
0
30 mV
gain error
Full 1.2 %FS
Vref
+25°C 2.2 2.37 2.6
V
1
1
ANALOG INPUTS
analog differential input voltage range
analog input resistance (single ended)
analog input resistance (differential)
analog input capacitance (single-ended)
Full 2.048
Full 500
Full 1000
Full 2
Vpp
pF
ENCODE INPUTS (Universal)
VIH
VIL
differential input swing
+25°C
+25°C
+25°C
0
0.2
5 V 3, 4
V 3, 4
V 3, 4
DIGITAL OUTPUTS
output voltage
OUTLEV = 1 (open)
OUTLEV = 0 (GND)
logic LOW
logic HIGH
logic HIGH
+25°C
0.01 0.4
+25°C 3.2 3.5 3.8
+25°C 2.4 2.7 3.0
V
V
V
1
1
1
POWER REQUIREMENTS
+5V supply current
Power dissipation
VCC power supply rejection ratio
Full
Full
+25°C
128 150 mA
640 750 mW
64 dB
1
1
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
http://www.national.com
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CLC5955









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CLC5955 Даташит, Описание, Даташиты
CLC5955 Electrical Characteristics (Vcc= +5V, 55MSPS; unless specified) (Tmin = -40°C, Tmax = +85°C)
PARAMETERS
CONDITIONS
SYMB TEMP
RATINGS
UNITS NOTES
MIN TYP MAX
2
TIMING (CL =7pF DATA; 10pF DAV)
max conversion rate (ENCODE)
min conversion rate (ENCODE)
pulse width high (ENCODE)
50% threshold
pulse width low (ENCODE)
50% threshold
ENCODE falling edge to DATA not valid
ENCODE falling edge to DATA guaranteed valid
rising ENCODE to rising DAV delay 50% threshold
DATA setup time before rising DAV
DATA hold time after rising DAV
pipeline latency
tP
tM
tDNV
tDGV
tDAV
tS
tH
Full
+25°C
Full
Full
Full
Full
Full
Full
Full
Full
55
9.1
9.1
8.3
8.3
tM-2.4
tP-1.6
75
10
MSPS
MSPS
ns
ns
ns
17.8 ns
12.6 ns
ns
ns
3.0 clk cycle
1
3
3
3
3
3
3
3
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
1) These parameters guaranteed by test.
2) Typical specifications are based on the mean test values of
deliverable converters from the first three diffusion lots.
3) Values guaranteed based on characterization and simulation.
Notes
4) See page 8, Figure 3 for ENCODE Inputs circuit.
Absolute Maximum Ratings
positive supply voltage (Vcc)
differential voltage between any two grounds
analog input voltage range
digital input voltage range
output short circuit duration (one-pin to ground)
junction temperature
storage temperature range
lead solder duration (+300°C)
ESD tolerance
human body model
machine model
-0.5V to +6V
<100mV
GND to Vcc
-0.5V to +Vcc
infinite
175°C
-65°C to 150°C
10sec
2000V
200V
Note: Absolute maximum ratings are limiting values, to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied. Exposure to
maximum ratings for extended periods may affect device reliability.
Recommended Operating Conditions
positive supply voltage (Vcc)
analog input voltage range
operating temperature range
+5V ±5%
2.048Vpp diff.
-40°C to +85°C
Package Thermal Resistance
Package
48-pin TSSOP
θJA
56°C/W
θJC
16°C/W
Reliability Information
Transistor count
5000
Model
CLC5955MTDX
Ordering Information
Temperature Range
-40°C to +85°C
Description
48-pin TSSOP (TNR 1000 pc reel)
CLC5955
3 http://www.national.com










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