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PDF HT48C062 Data sheet ( Hoja de datos )
| Número de pieza | HT48C062 | |
| Descripción | (HT48R062 / HT48C062) Cost Effective I/O Type 8-Bit MCU | |
| Fabricantes | Holtek Semiconductor | |
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www.DataSheet4U.com
HT48R062/HT48C062
Cost-Effective I/O Type 8-Bit MCU
Technical Document
· Tools Information
· FAQs
· Application Note
- HA0003E Communicating between the HT48 & HT46 Series MCUs and the HT93LC46 EEPROM
- HA0013E HT48 & HT46 LCM Interface Design
- HA0016E Writing and Reading to the HT24 EEPROM with the HT48 MCU Series
- HA0018E Controlling the HT1621 LCD Controller with the HT48 MCU Series
- HA0049E Read and Write Control of the HT1380
Features
· Operating voltage:
fSYS=4MHz: 2.2V~5.5V
fSYS=8MHz: 3.3V~5.5V
· 11 bidirectional I/O lines
· On-chip crystal and RC oscillator
· Watchdog Timer
· 1K´14 program memory
· 32´8 data RAM
· HALT function and wake-up feature reduce power
consumption
General Description
The HT48R062/HT48C062 are 8-bit high performance,
RISC architecture microcontroller devices specifically
designed for cost-effective multiple I/O control product
applications. The mask version HT48C062 is fully pin
and functionally compatible with the OTP version
HT48R062 devices.
· 63 powerful instructions
· Up to 0.5ms instruction cycle with 8MHz system clock
· All instructions in 1 or 2 machine cycles
· 14-bit table read instructions
· One-level subroutine nesting
· Bit manipulation instructions
· Low voltage reset function
· 16-pin DIP/NSOP package
The advantages of low power consumption, I/O flexibil-
ity, oscillator options, HALT and wake-up functions,
watchdog timer, as well as low cost, enhance the versa-
tility of these devices to suit a wide range of application
possibilities such as industrial control, consumer prod-
ucts, subsystem controllers, etc.
Block Diagram
P ro g ra m
In s tr u c tio n
R e g is te r
P ro g ra m
C o u n te r
S ta c k
MP M
U
X
D a ta
M e m o ry
In s tr u c tio n
D ecoder
T im in g
G e n e ra to r
O SC2
O SC1
RES
VDD
VSS
M UX
A LU
S h ifte r
STATU S
ACC
M
W DT U
X
H A L T E N /D IS
LV R
PAC
P o rt A
PA
S y s te m C lo c k /4
¸2
W DT O SC
(2 4 k H z )
P A 0~P A 7
PBC
P B P o rt B
P B 0~P B 2
Rev. 1.11
1 October 30, 2006
1 page  
www.DataSheet4U.com
HT48R062/HT48C062
Program Memory - ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data and table and is organized into 1024´14 bits, ad-
dressed by the program counter and table pointer.
Certain locations in the program memory are reserved
for special usage:
· Location 000H
This area is reserved for the initialization program. Af-
ter chip reset, the program always begins execution at
location 000H.
· Table location
Any location in the EPROM space can be used as
look-up tables. The instructions ²TABRDC [m]² (the
current page, one page=256 words) and ²TABRDL
[m]² (the last page) transfer the contents of the
lower-order byte to the specified data memory, and
the higher-order byte to TBLH (08H). Only the desti-
nation of the lower-order byte in the table is
well-defined, the other bits of the table word are trans-
ferred to the lower portion of TBLH, the remaining 2
bits are read as ²0². The Table Higher-order byte reg-
ister (TBLH) is read only. The table pointer (TBLP) is a
read/write register (07H), where P indicates the table
location. Before accessing the table, the location must
be placed in TBLP. The TBLH is read only and cannot
be restored. All table related instructions need 2 cy-
cles to complete the operation. These areas may
function as normal program memory depending upon
the requirements.
000H
D e v ic e in itia liz a tio n p r o g r a m
n00H
L o o k - u p ta b le ( 2 5 6 w o r d s )
nFFH
P ro g ra m
L o o k - u p ta b le ( 2 5 6 w o r d s )
3FFH
1 4 b its
N o te : n ra n g e s fro m 0 to 3
Program Memory
Stack Register - STACK
This is a special part of the memory used to save the
contents of the Program Counter only. The stack is orga-
nized into one level and is neither part of the data nor
part of the program space, and is neither readable nor
writeable. The activated level is indexed by the stack
pointer (SP) and is neither readable nor writeable. At a
subroutine call the contents of the program counter are
pushed onto the stack. At the end of a subroutine sig-
naled by a return instruction (RET), the program counter
is restored to its previous value from the stack. After a
chip reset, the SP will point to the top of the stack.
If the stack is full and a ²CALL² is subsequently exe-
cuted, stack overflow occurs and the first entry will be
lost (only the most recent return address is stored).
Data Memory - RAM
The data memory is designed with 44´8 bits. The data
memory is divided into two functional groups: special
function registers and general purpose data memory
(32´8). Most of them are read/write, but some are read
only.
The special function registers include the Indirect Ad-
dressing Register (00H), the Memory Pointer register
(MP;01H), the Accumulator (ACC;05H) the Program
Counter Lower-order byte register (PCL;06H), the Table
Pointer (TBLP;07H), the table higher-order byte register
(TBLH;08H), the Watchdog Timer option setting register
(WDTS;09H), the STATUS register (STATUS;0AH), the
I/O registers (PA;12H, PB;14H) and I/O control registers
(PAC;13H, PBC;15H). The remaining space before the
20H is reserved for future expanded usage and reading
these locations will return the result 00H. The general
purpose data memory, addressed from 20H to 3FH, is
used for data and control information under instruction
command.
All data memory areas can handle arithmetic, logic, in-
crement, decrement and rotate operations directly. Ex-
cept for some dedicated bits, each bit in the data
memory can be set and reset by the ²SET [m].i² and
²CLR [m].i² instructions, respectively. They are also indi-
rectly accessible through memory pointer register
(MP;01H).
Instruction(s)
TABRDC [m]
TABRDL [m]
Table Location
*9 *8 *7 *6 *5 *4 *3 *2 *1 *0
P9 P8 @7 @6 @5 @4 @3 @2 @1 @0
1 1 @7 @6 @5 @4 @3 @2 @1 @0
Note: *9~*0: Table location bits
P9~P8: Current program counter bits
Table Location
@7~@0: Table pointer bits
Rev. 1.11
5 October 30, 2006
5 Page 
www.DataSheet4U.com
HT48R062/HT48C062
Options
The following table shows eight kinds of code option in the HT48R062/HT48C062. All the code options must be defined
to ensure proper system functioning.
No. Options
1 WDT clock source: WDTOSC or fSYS/4
2 WDT function: enable or disable
3 LVR function: enable or disable
4 CLRWDT instruction(s): one or two clear WDT instruction(s)
5 System oscillator: RC or crystal
6 PA and PB pull-high resistors: none or pull-high
7 PA0~PA7 wake-up: enable or disable
Application Circuits
V DD
0 .0 1 m F *
VDD
100kW
0 .1 m F
10kW
RES
0 .1 m F *
VSS
P A 0~P A 7
P B 0~P B 2
O SC
C ir c u it
S e e R ig h t S id e
O SC1
O SC2
H T 4 8 R 0 6 2 /H T 4 8 C 0 6 2
V DD
470pF
O SC1
R O SC
fS Y S /4
O SC2
N M O S o p e n d r a in
C1
O SC1
C2
R1
O SC2
R C S y s te m O s c illa to r
24kW < R OSC< 1M W
C r y s ta l S y s te m O s c illa to r
F o r th e v a lu e s ,
s e e ta b le b e lo w
O S C C ir c u it
Note:
The resistance and capacitance for reset circuit should be designed to ensure that the VDD is stable and re-
mains in a valid range of the operating voltage before bringing RES high.
²*² Make the length of the wiring, which is connected to the RES pin as short as possible, to avoid noise
interference.
The following table shows the C1, C2 and R1 values corresponding to the different crystal values. (For refer-
ence only)
Crystal or Resonator
C1, C2
R1
4MHz Crystal
25pF
10kW
4MHz Resonator
10pF
12kW
3.58MHz Crystal
25pF
10kW
3.58MHz Resonator
25pF
10kW
2MHz Crystal
30pF
12kW
2MHz Resonator
25pF
12kW
1MHz Crystal
100pF
10kW
480kHz Resonator
300pF
9.1kW
455kHz Resonator
300pF
10kW
429kHz Resonator
300pF
10kW
400kHz Resonator
300pF
10kW
The function of the resistor R1 is to ensure that the oscillator will switch off should low voltage condi-
tions occur. Such a low voltage, as mentioned here, is one which is less than the lowest value of the
MCU operating voltage. Note however that if the LVR is enabled then R1 can be removed.
Rev. 1.11
11 October 30, 2006
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HT48C062.PDF ] | |
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