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PDF NX5850 Data sheet ( Hoja de datos )
| Número de pieza | NX5850 | |
| Descripción | Digital Audio SoC | |
| Fabricantes | Nexia | |
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NX5850
User’s Manual
Version 0.5 Sept. 23, 2005
Preliminary
Copyright 2005 NEXIA DEVICE CO., LTD. , New Name of Mobile Doctor Co., Ltd., All rights
reserved.
NEXIA DEVICE CO., LTD. Confidential and Proprietary
The information in this document is proprietary to NEXIA DEVICE CO., LTD.
The information shall not be used, copied, reproduced or disclosed in whole or in part
without written consent of NEXIA DEVICE CO., LTD.
The information can be changed by NEXIA DEVICE CO., LTD. without notice for its
purpose and revision
1 page  
NX5850
Digital Audio SoC
Preliminary
2. Product Overview
5
5 Page 
NX5850
Digital Audio SoC
Preliminary
Table 4. Analog Signal Description
Signal
Name
AIN
[3:0]
VBOT
VTOP
Type
AI
AI
AI
Description
Analog Input
These pins are analog input for internal ADC, which converts the
analog input signal into 8-bit binary digital codes at a maximum
conversion rate of 1MSPS with 10Mhz clock.
Reference Bottom
Bottom level of the ADC. The pin is connected to analog ground.
Reference Top
The analog input is single-ended type and the range is from VTOP
to VBOT. The analog input voltage follows reference voltage range
fundamentally. So, if you want to alter into the another input range,
you should change the voltage value of VTOP.
Pin
Number
118,119,120,121
122
123
Table 5. External Memory Interface (MMC) Signal Description
Signal
Name
MMC
CLK
MMC
DATA
MMC
CMD
MMC
DATA1
MMC
DATA2
MMC
DATA3
Type
I/O
I/O
I/O
I/O
I/O
I/O
MMC Clock
MMC Data 0
MMC Command
GPIO0
MMC DATA 1
GPIO1
MMC DATA 2
GPIO2
MMC DATA 3
Description
Pin
Number
64
65
66
74
75
76
Table 6. External Nand Flash Memory Interface Signal Description
Signal
Name
FCEN3
FCEN2
FCEN1
FCEN0
FCLE
FALE
FWEN
FREN
FRNB
FIO
[7:0]
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Description
NAND Chip Enable 3
NAND Chip Enable 2
NAND Chip Enable 1
NAND Chip Enable 0
NAND Command Latch Enable
NAND Address Latch Enable
NAND Write Enable Strobe
NAND Read Enable Strobe
NAND Ready and Busy
NAND I/O [7:0]
Pin
Number
97
98
99
100
103
104
105
106
88
89,90,91,92,93,94,95,96
Table 7. External Nor Flash Memory Interface Signal Description
Signal
Name
NRCS1
NRCS0
NWR
NRD
ADDR
[7:0]
ADDR
[15:8]
Type
I/O
I/O
I/O
I/O
O
O
Description
NOR Chip Enable 1 (F_CE1)
NOR Chip Enable 0 (F_CE0)
NOR Write Data Strobe (P3.6)
NOR Read Data Strobe (P3.7)
NOR Address [7:0]
NOR Address [15:8]
Pin
Number
99
100
44
45
84,85,86,87,10,11,12,13
89,90,91,92,93,94,95,96
11
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