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PDF AM29DS163D Data sheet ( Hoja de datos )
| Número de pieza | AM29DS163D | |
| Descripción | Simultaneous Operation Flash Memory | |
| Fabricantes | AMD | |
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Am29DS163D
Data Sheet
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-
inally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
Publication Number 22326 Revision A Amendment +1 Issue Date November 8, 2004
1 page  
ADVANCE INFORMATION
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29DS163D Device Bus Operations .............................10
Word/Byte Configuration ........................................................ 10
Requirements for Reading Array Data ................................... 10
Writing Commands/Command Sequences ............................ 11
Accelerated Program Operation ......................................................11
Autoselect Functions .......................................................................11
Simultaneous Read/Write Operations with Zero Latency ....... 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 12
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Table 2. Am29DS163D Device Bank Divisions ...............................12
Table 3. Top Boot Sector Addresses (Am29DS16xDT) ..................13
SecSi Sector Addresses for Top Boot Devices.............................. 13
Table 5. Bottom Boot Sector Addresses (Am29DS16xDB) ............14
SecSi Sector Addresses for Bottom Boot Devices......................... 14
Autoselect Mode ..................................................................... 15
Table 7. Am29DS163D Autoselect Codes (High Voltage Method) 15
Sector/Sector Block Protection and Unprotection .................. 16
Table 8. Top Boot Sector/Sector Block Addresses
for Protection/Unprotection .............................................................16
Table 9. Bottom Boot Sector/Sector Block Addresses
for Protection/Unprotection .............................................................16
Write Protect (WP#) ................................................................ 17
Temporary Sector/Sector Block Unprotect ............................. 17
Figure 1. Temporary Sector Unprotect Operation........................... 17
Figure 2. In-System Sector/Sector Block Protect
and Unprotect Algorithms................................................................ 18
SecSi (Secured Silicon) Sector Flash Memory Region .......... 19
Hardware Data Protection ...................................................... 19
Low VCC Write Inhibit .....................................................................20
Write Pulse “Glitch” Protection ........................................................20
Logical Inhibit ..................................................................................20
Power-Up Write Inhibit ....................................................................20
Common Flash Memory Interface (CFI) . . . . . . . 20
Table 10. CFI Query Identification String ........................................ 20
System Interface String................................................................... 21
Table 12. Device Geometry Definition ............................................ 21
Table 13. Primary Vendor-Specific Extended Query ...................... 22
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 23
Reading Array Data ................................................................ 23
Reset Command ..................................................................... 23
Autoselect Command Sequence ............................................ 23
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 24
Byte/Word Program Command Sequence ............................. 24
Unlock Bypass Command Sequence ..............................................24
Figure 3. Program Operation .......................................................... 25
Chip Erase Command Sequence ........................................... 25
Sector Erase Command Sequence ........................................ 25
Erase Suspend/Erase Resume Commands ........................... 26
Figure 4. Erase Operation.............................................................. 26
Table 14. Am29DS163D Command Definitions.............................. 27
Write Operation Status . . . . . . . . . . . . . . . . . . . . 28
DQ7: Data# Polling ................................................................. 28
Figure 5. Data# Polling Algorithm .................................................. 28
RY/BY#: Ready/Busy# ............................................................ 29
DQ6: Toggle Bit I .................................................................... 29
Figure 6. Toggle Bit Algorithm........................................................ 29
DQ2: Toggle Bit II ................................................................... 30
Reading Toggle Bits DQ6/DQ2 ............................................... 30
DQ5: Exceeded Timing Limits ................................................ 30
DQ3: Sector Erase Timer ....................................................... 30
Table 15. Write Operation Status ................................................... 31
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 32
Figure 7. Maximum Negative Overshoot Waveform ...................... 32
Figure 8. Maximum Positive Overshoot Waveform....................... 32
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 32
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 9. ICC1 Current vs. Time (Showing Active
and Automatic Sleep Currents) ...................................................... 34
Figure 10. Typical ICC1 vs. Frequency ............................................ 34
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 11. Test Setup.................................................................... 35
Table 16. Test Specifications ......................................................... 35
Figure 12. Input Waveforms and Measurement Levels ................. 35
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 13. Read Operation Timings ............................................... 36
Figure 14. Reset Timings ............................................................... 37
Word/Byte Configuration (BYTE#) .......................................... 38
Figure 15. BYTE# Timings for Read Operations............................ 38
Figure 16. BYTE# Timings for Write Operations............................ 38
Erase and Program Operations .............................................. 39
Figure 17. Program Operation Timings.......................................... 40
Figure 18. Accelerated Program Timing Diagram.......................... 40
Figure 19. Chip/Sector Erase Operation Timings .......................... 41
Figure 20. Back-to-back Read/Write Cycle Timings ...................... 42
Figure 21. Data# Polling Timings (During Embedded Algorithms). 42
Figure 22. Toggle Bit Timings (During Embedded Algorithms)...... 43
Figure 23. DQ2 vs. DQ6................................................................. 43
Temporary Sector/Sector Block Unprotect ............................. 44
Figure 24. Temporary Sector/Sector Block
Unprotect Timing Diagram ............................................................. 44
Figure 25. Sector/Sector Block Protect/Unprotect Timing Diagram 45
Alternate CE# Controlled Erase and Program Operations ..... 46
Figure 26. Alternate CE# Controlled Write
(Erase/Program) Operation Timings .............................................. 47
Erase And Programming Performance . . . . . . . 48
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 48
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 49
FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA)
6 x 8 mm package ................................................................. 49
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 50
Am29DS163D
5
5 Page 
ADVANCE INFORMATION
addresses on the device address inputs produce valid
data on the device data outputs. Each bank remains
enabled for read access until the command register
contents are altered.
See “Requirements for Reading Array Data” on
page 10 for more information. Refer to the Table on
page 36 for timing specifications and to Figure 13, on
page 36 for the timing diagram. ICC1 in the DC Charac-
teristics table represents the active current
specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to VIL, and OE# to VIH.
For program operations, the BYTE# pin determines
whether the device accepts program data in bytes or
words. Refer to “Word/Byte Configuration” on page 10
for more information.
The device features an Unlock Bypass mode to facili-
tate faster programming. Once a bank enters the
Unlock Bypass mode, only two write cycles are re-
quired to program a word or byte, instead of four. The
“Word/Byte Configuration” section contains details on
programming data to the device using both standard
and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sec-
tors, or the entire device. Table 3 on page 13 to
Table 6 on page 14 indicate the address space that
each sector occupies. The device address space is di-
vided into two banks: Bank 1 contains the
boot/parameter sectors, and Bank 2 contains the
larger, code sectors of uniform size. A “bank address”
is the address bits required to uniquely select a bank.
Similarly, a “sector address” is the address bits re-
quired to uniquely select a sector.
ICC2 in the DC Characteristics table represents the ac-
tive current specification for the write mode. The “AC
Characteristics” on page 36 section contains timing
specification tables and timing diagrams for write
operations.
Accelerated Program Operation
The device offers accelerated program operations
through the ACC function. This is one of two functions
provided by the WP#/ACC pin. This function is prima-
rily intended to allow faster manufacturing throughput
at the factory.
If the system asserts VHH on this pin, the device auto-
matically enters the aforementioned Unlock Bypass
mode, temporarily unprotects any protected sectors,
and uses the higher voltage on the pin to reduce the
time required for program operations. The system
would use a two-cycle program command sequence
as required by the Unlock Bypass mode. Removing
VHH from the WP#/ACC pin returns the device to nor-
mal operation. Note that the WP#/ACC pin must not be
at VHH for operations other than accelerated program-
ming, or device damage may result. In addition, the
WP#/ACC pin must not be left floating or unconnected;
inconsistent behavior of the device may result.
Autoselect Functions
If the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in
this mode. Refer to “Autoselect Mode” on page 15 and
“Autoselect Command Sequence” on page 23 for
more information.
Simultaneous Read/Write Operations with
Zero Latency
This device is capable of reading data from one bank
of memory while programming or erasing in the other
bank of memory. An erase operation may also be sus-
pended to read from or program to another location
within the same bank (except the sector being
erased). Figure 20, on page 42 shows how read and
write cycles may be initiated for simultaneous opera-
tion with zero latency. ICC6 and ICC7 in the DC
Characteristics table represent the current specifica-
tions for read-while-program and read-while-erase,
respectively.
Standby Mode
When the system is not reading or writing to the de-
vice, it can place the device in the standby mode. In
this mode, current consumption is greatly reduced,
and the outputs are placed in the high impedance
state, independent of the OE# input.
The device enters the CMOS standby mode when the
CE# and RESET# pins are both held at VCC ± 0.3 V.
(Note that this is a more restricted voltage range than
VIH.) If CE# and RESET# are held at VIH, but not within
VCC ± 0.3 V, the device is in the standby mode, but the
standby current is greater. The device requires stan-
dard access time (tCE) for read access when the
device is in either of these standby modes, before it is
ready to read data.
If the device is deselected during erasure or program-
ming, the device draws active current until the
operation is completed.
ICC3 in the DC Characteristics table represents the
standby current specification.
Am29DS163D
11
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| PDF Descargar | [ Datasheet AM29DS163D.PDF ] | |
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