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PDF SI4212 Data sheet ( Hoja de datos )
| Número de pieza | SI4212 | |
| Descripción | Aero IIe Transceiver | |
| Fabricantes | Silicon | |
| Logotipo |  |
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Si4212
Aero IIe Transceiver for GSM, GPRS, and EDGE
Description
The Aero® IIe transceiver is a complete RF front end for
multi-band GSM, GPRS, and EDGE wireless
communications. The receive section interfaces between
the RF band-select SAW filters and the baseband
processor. The transmit section interfaces between the
baseband processor and the power amplifier and uses a
unique dual-transmitter architecture for EDGE. In GMSK
mode, the offset phase locked loop (OPLL) is modulated by
the I and Q signals. In 8-PSK mode, the OPLL is
unmodulated and acts as a local oscillator (LO) to the
direct upconversion mixer. All functions traditionally
performed by sensitive components such as VCOs, loop
filters, tuning inductors, and varactors are integrated into
the integrated circuit (IC). The Aero IIe transceiver includes
a digitally-controlled crystal oscillator (DCXO) and
completely integrates the reference oscillator and varactor
functions. The Aero IIe digital low-IF receiver architecture
provides inherent suppression of dc offsets, preventing the
need for dc offset compensation, manufacturing
calibration, or related baseband support.
Features
- 5 x 6 mm 36-pin QFN
- Highly integrated transceiver supports both GMSK
and 8-PSK modulation
- Unique dual-transmitter architecture
- Integrated frequency synthesizer including all VCOs
and loop filters
- Digital low-IF receiver including digital filter
- Quad-band LNAs
- Integrated digitally-controlled crystal oscillator
(DCXO)
- Analog baseband interface
- Class 12 compliant for GPRS and EDGE
- 3-wire serial control interface
- 2.7 to 3.0 V operation
- CMOS process technology
Applications
- Multi-band GSM/GPRS/EDGE cellular handsets
and smart phones
- Multi-band GSM/GPRS/EDGE data modems
850 RFIA LNA
900 RFIG LNA
PGA
I
ADC
1800 RFID LNA
1900 RFIP LNA
PGA
Q
ADC
0 / 90
LOW-IF
φ
DET
Si4212
PGA
I
PGA
Q
RAMPIN
850
900 RFOL
1800 PA
1900 RFOH
DVGA
DVGA
0 / 90
RAMPOUT PA
CTRL
AVGA
AVGA
VCO + FREQUENCY
SYNTHESIZER
DCXO
XTAL1
XTAL2
XOUT
AFC
Aero IIe
Copyright © 2005 by Silicon Laboratories
9.16.05
1 page | ||
| Páginas | Total 2 Páginas | |
| PDF Descargar | [ Datasheet SI4212.PDF ] | |
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