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PDF CR80P200 Data sheet ( Hoja de datos )
| Número de pieza | CR80P200 | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | Crescenic Technology | |
| Logotipo |  |
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TM
CR80P200
8-Bit Microcontroller
DATA SHEET
=========CR80P200=========
Crescenic Technology Corporation
All rights reserved .
FR18005A
2002/12/27/Vr. 0.2/All rights reserved.
1
1 page  
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TM CR80P200
a Port A interrupt
a Timer/counter interrupt
and a Watchdog timer timeout interrupt
l Bonding options:
n Multiple Vref. comparator or single Vref. Comparator
n Parallel programming or serial programming
lConfigure options:
-- 4 oscillator types selected by code option:
RC -- RC oscillator
LFXT -- Low frequency crystal oscillator
XTAL -- Crystal oscillator
HFXT -- High frequency crystal oscillator
-- 4 oscillator start-up time selected by code option:
172µs, 22ms, 44ms, and 88ms
--Watchdog timer: enabled, disabled, and disabled during sleep, selected by code option
Serial programming needs only 5 pins (Vdd, Vss, CNTI, PA0, PA1) to program EPROM and
configurations. It is suitable for on-board programming or packages with fewer pins.
2. Pins Assignment
The package patterns of CR80P200, corresponding to the programming mode for EPROM
and the reference voltage of comparators, are respectively divided as follows:
CR80P200A for single Vref. in parallel programming mode
CR80P200B for multiple Vref. in parallel programming mode
CR80P200D for single Vref. in serial programming mode
CR80P200E for multiple Vref. in serial programming mode
Illustrated as below are the package patterns mentioned above and said pins configuration.
FR18005A
2002/12/27/Vr. 0.2/All rights reserved.
5
5 Page 
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TM CR80P200
Memory Bank ( OPT bit7=1), illustrated in the form of table below:
Address
Description
MIR<6:5>
Bank 0
00
Bank 1
01
Bank 2
10
Bank 3
11
00h IND
01h TCR
02h PCL
03h SFR
04h MIR
05h RPA
06h RPB
07h RPC
Address map back
to address in bank 0
08h~0Fh General Purpose
Register
10h~1Fh
30h~3Fh
50h~5Fh
70h~7Fh
General Purpose General Purpose General Purpose General Purpose
Register
Register
Register
Register
5. Function Control Registers
5.1 Special Function Control Registers
Address Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
00h IND Use contents of MIR to address data memory (not a physical register)
01h TCR
8 bits of real-time clock/counter
02h PCL
Program counter with low byte
03h SFR GB PP1 PP0 /WD /SP Z AC C
04h MIR
Indirect data memory address pointer
05h RPA RPA7 RPA6 RPA5 RPA4 RPA3 RPA2 RPA1 RPA0
06h RPB -
- RPB5 RPB4 RPB3 RPB2 RPB1 RPB0
07h RPC RPC7 RPC6 RPC5 RPC4 RPC3 RPC2 RPC1 RPC0
Note:
1. Access to these control registers can be executed in normal direct or indirect addressing
mode.
2. GB does not defined as a specified function and can be used as a general purpose memory bit .
3. Bit 7 of MIR is an unimplemented bit, always read as ‘1’.
4.The symbol “-“ means an unimplemented bit, always read as ‘0’.
5. Legend: GB = General memory Bit
PP1, PP0 = Program memory page bits
/WD = WatchDog flag
/SP = SleeP flag
AC = Auxiliary Carry flag
C = Carry flag
FR18005A
2002/12/27/Vr. 0.2/All rights reserved.
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CR80P200.PDF ] | |
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