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STAC9200D PDF даташит

Спецификация STAC9200D изготовлена ​​​​«IDT» и имеет функцию, называемую «2-CHANNEL HIGH DEFINITION AUDIO CODEC».

Детали детали

Номер произв STAC9200D
Описание 2-CHANNEL HIGH DEFINITION AUDIO CODEC
Производители IDT
логотип IDT логотип 

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STAC9200D Даташит, Описание, Даташиты
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2-CHANNEL HIGH DEFINITION AUDIO CODEC
DATA SHEET
STAC9200/9200D
Description
The STAC9200/9200D is a high quality, 2-channel audio
CODEC compatible with the Intel High Definition (HD)
Audio Interface. The STAC9200/9200D provides Stereo
24-Bit resolution with sample rates up to 192 KHz. SPDIF
I/O provides connectivity to consumer electronic
equipment. The STAC9200/9200D incorporates IDT's
proprietary SD technology to achieve an estimated DAC
SNR in excess of 100dB.
The STAC9200/9200D provides high quality, HD Audio
capability to notebook and cost sensitive desktop PC
applications.
Features
High performance SD technology
100dB DAC SNR
Intel HD Audio Interface
Two Channel DACs and ADCs with 24-bit
resolution
Sample rates up to 192 KHz
Mixer-less design
Low-latency Karaoke Mode Supported
Integrated Headphone Amplifiers
Stereo Microphone
Supports Stereo Microphone
Microphone Boost 0, 10, 20, 30, 40dB
Direct CDROM Recording Mixerless Design
S/PDIF In and Out
Universal JacksTM Functionality for jack retasking
Adjustable VREF Out
Digital PC Beep to all outputs
+3.3 V, +4 V and +5 V analog power supply options
(The +4 V Analog voltage is supported by the +5 V version of
the STAC9200 or STAC9200D. Request +4 V configuration of
the driver.)
32-pad QFN (5mm x 5mm) and 48-pin LQFP
package options
Dolby Sound Room Compliant (STAC9200D only)
(System manufacturers must obtain system license from
Dolby.)
Dolby Home Theater Compliant (STAC9200D only)
(System manufacturers must obtain system license from
Dolby.)
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
1
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06









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STAC9200D Даташит, Описание, Даташиты
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table of Contents
1. DESCRIPTION ........................................................................................................................... 9
2. PERFORMANCE ..................................................................................................................... 10
2.1. Audio Fidelity ................................................................................................................................... 10
2.2. Electrical Specifications ................................................................................................................... 10
2.2.1. Absolute Maximum Ratings ............................................................................................... 10
2.2.2. Recommended Operation Conditions ............................................................................... 10
2.3. Power Consumption ........................................................................................................................ 11
2.3.1. Digital ................................................................................................................................. 11
2.3.2. Analog ............................................................................................................................... 11
2.4. STAC9200/9200D 5V Analog Performance Characteristics ........................................................... 12
2.5. STAC9200/9200D 4V Analog Performance Characteristics ........................................................... 14
2.6. STAC9200/9200D 3.3V Analog Performance Characteristics ........................................................ 16
3. EXTENDED FEATURE EXPLANATION ................................................................................. 18
3.1. SPDIF Input ..................................................................................................................................... 18
3.2. SPDIF Output .................................................................................................................................. 18
3.3. Universal JacksTM .......................................................................................................................... 18
3.4. Audio Jack Presence Detect ........................................................................................................... 18
4. BLOCK DIAGRAMS AND TYPICAL HOOKUPS .................................................................... 19
4.1. Functional Block Diagram ................................................................................................................ 19
4.2. STAC9200/9200D Typical Connection Diagram for 48-pin LQFP ................................................... 20
4.3. STAC9200/9200D Split Independent Power Supply for 48-pin LQFP ............................................. 20
4.4. STAC9200/9200D Typical Connection Diagram for 32-pad QFN ................................................... 20
4.5. STAC9200/9200D Split Independent Power Supply for 32-pad QFN ............................................. 20
5. WIDGET INFORMATION .........................................................................................................21
5.1. Widget Diagram ............................................................................................................................... 21
5.2. STAC9200/9200D Widget List ........................................................................................................ 22
5.3. Root Node (NID = 0x00) .................................................................................................................. 23
5.3.1. Root PnpID ....................................................................................................................... 23
5.3.2. Root RevID ..................................................................................................................... 23
5.3.3. Root NodeInfo .................................................................................................................. 24
5.4. AFG Node (NID = 0x01) .................................................................................................................. 24
5.4.1. AFG Reset ........................................................................................................................ 24
5.4.2. AFG NodeInfo ................................................................................................................... 25
5.4.3. AFG Type ......................................................................................................................... 25
5.4.4. AFG GrpCap ..................................................................................................................... 25
5.4.5. AFG FrmtCap ................................................................................................................... 26
5.4.6. AFG StreamCap ............................................................................................................... 27
5.4.7. AFG PwrCap .................................................................................................................... 28
5.4.8. AFG GPIOCap .................................................................................................................. 28
5.4.9. AFG OutAmpCap ............................................................................................................. 29
5.4.10. AFG PwrState ................................................................................................................. 30
5.4.11. AFG UnsolResp .............................................................................................................. 30
5.4.12. AFG GPIO ...................................................................................................................... 31
5.4.13. AFG GPIOEn .................................................................................................................. 32
5.4.14. AFG GPIODir .................................................................................................................. 33
5.4.15. AFG GPIOWake ............................................................................................................. 33
5.4.16. AFG GPIOUnsolEn ......................................................................................................... 34
5.4.17. AFG GPIOSticky ............................................................................................................. 35
5.4.18. AFG SysID ...................................................................................................................... 36
5.5. DAC0Cnvtr Node (NID = 0x02) ....................................................................................................... 37
5.5.1. DAC0Cnvtr Frmt ............................................................................................................... 37
5.5.2. DAC0Cnvtr WCap ............................................................................................................ 38
5.5.3. DAC0Cnvtr PwrState ......................................................................................................... 39
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
2
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06









No Preview Available !

STAC9200D Даташит, Описание, Даташиты
STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
5.5.4. DAC0Cnvtr Stream ........................................................................................................... 40
5.6. ADC0Cnvtr Node (NID = 0x03) ...................................................................................................... 40
5.6.1. ADC0Cnvtr Frmt ............................................................................................................... 40
5.6.2. ADC0Cnvtr WCap ............................................................................................................ 41
5.6.3. ADC0Cnvtr ConnLen ........................................................................................................ 42
5.6.4. ADC0Cnvtr ConnLst ......................................................................................................... 43
5.6.5. ADC0Cnvtr ProcState ....................................................................................................... 43
5.6.6. ADC0Cnvtr PwrState ........................................................................................................ 44
5.6.7. ADC0Cnvtr Stream ........................................................................................................... 45
5.7. SPDIFinCnvtr Node (NID = 0x04) ................................................................................................... 45
5.7.1. SPDIFinCnvtr Frmt ........................................................................................................... 45
5.7.2. SPDIFinCnvtr WCap ......................................................................................................... 46
5.7.3. SPDIFinCnvtr FrmtCap ..................................................................................................... 47
5.7.4. SPDIFinCnvtr StreamCap ................................................................................................ 48
5.7.5. SPDIFinCnvtr ConnLen .................................................................................................... 49
5.7.6. SPDIFinCnvtr ConnLst ..................................................................................................... 49
5.7.7. SPDIFinCnvtr Stream ....................................................................................................... 50
5.7.8. SPDIFinCnvtr DigCtl ......................................................................................................... 50
5.8. SPDIFoutCnvtr Node (NID = 0x05) ................................................................................................. 51
5.8.1. SPDIFoutCnvtr Frmt ......................................................................................................... 51
5.8.2. SPDIFoutCnvtr WCap ...................................................................................................... 52
5.8.3. SPDIFoutCnvtr FrmtCap .................................................................................................. 53
5.8.4. SPDIFoutCnvtr StreamCap .............................................................................................. 54
5.8.5. SPDIFoutCnvtr Stream ..................................................................................................... 55
5.8.6. SPDIFoutCnvtr DigCtl ....................................................................................................... 55
5.9. DAC0Mux Node (NID = 0x07) ........................................................................................................ 56
5.9.1. DAC0Mux WCap .............................................................................................................. 56
5.9.2. DAC0Mux ConnLen .......................................................................................................... 57
5.9.3. DAC0Mux ConnSel .......................................................................................................... 58
5.9.4. DAC0Mux ConnLst ........................................................................................................... 58
5.9.5. DAC0Mux LR .................................................................................................................... 58
5.10. DigInPin Node (NID = 0x08) .......................................................................................................... 59
5.10.1. DigInPin WCap ............................................................................................................... 59
5.10.2. DigInPin Cap .................................................................................................................. 60
5.10.3. DigInPin PwrState .......................................................................................................... 61
5.10.4. DigInPin Ctl ...................................................................................................................... 61
5.10.5. DigInPin UnsolResp ....................................................................................................... 62
5.10.6. DigInPin Sense ............................................................................................................... 62
5.10.7. DigInPin EAPD ............................................................................................................... 63
5.10.8. DigInPin Config ............................................................................................................... 63
5.11. DigOutPin Node (NID = 0x09) ....................................................................................................... 64
5.11.1. DigOutPin WCap ............................................................................................................ 64
5.11.2. DigOutPin Cap ................................................................................................................ 65
5.11.3. DigOutPin ConnLen ........................................................................................................ 66
5.11.4. DigOutPin ConnSel ........................................................................................................ 67
5.11.5. DigOutPin ConnLst ......................................................................................................... 67
5.11.6. DigOutPin Ctl .................................................................................................................. 67
5.11.7. DigOutPin Config ............................................................................................................ 68
5.12. ADC0Mux Node (NID = 0x0A) ....................................................................................................... 69
5.12.1. ADC0Mux VolRight ......................................................................................................... 69
5.12.2. ADC0Mux VolLeft ........................................................................................................... 69
5.12.3. ADC0Mux WCap ............................................................................................................ 70
5.12.4. ADC0Mux OutAmpCap .................................................................................................. 71
5.12.5. ADC0Mux ConnLen ........................................................................................................ 71
5.12.6. ADC0Mux ConnLst ......................................................................................................... 72
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC
3
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06










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