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PDF APU3048 Data sheet ( Hoja de datos )
| Número de pieza | APU3048 | |
| Descripción | DUAL SYNCHRONOUS PWM CONTROLLER CIRCUITRY AND LDO CONTROLLER | |
| Fabricantes | Advanced Power Electronics | |
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Technology Licensed from International Rectifier
APU3048
DUAL SYNCHRONOUS PWM CONTROLLER
CIRCUITRY AND LDO CONTROLLER
FEATURES
PRELIMINARY DATA SHEET
DESCRIPTION
Dual Synchronous Controller in 16-Pin Package
with 1808 out-of-phase operation
LDO Controller with 40mA drive
Configured as 2-Independent PWM Controller
Flexible, Same or Separate Supply Operation
Operation from 4V to 25V Input
www.DataSheet4U.com Internal 200KHz Oscillator
Soft-Start controls all outputs
Fixed Frequency Voltage Mode
500mA Peak Output Drive Capability
Programmable Outputs
RoHS Compliant
APPLICATIONS
DDR Memory Source Sink Vtt Application
Graphic Card
Hard Disk Drive
Power supplies requiring multiple outputs
The APU3048 IC combines a Dual synchronous Buck
controller and a linear regulator controller, providing a
cost-effective, high performance and flexible solution for
multi-output applications. The Dual synchronous con-
troller is configured as 2-independent PWM controller.
APU3048 provides a separate adjustable output by driv-
ing a switch as a linear regulator. This device features an
internal 200KHz oscillator, under-voltage lockout for all
input supplies, an external programmable soft start func-
tion as well as output under-voltage detection that latches
off the device when an output short is detected.
TYPICAL APPLICATION
12V
5V
3.3V
Q1
VcH1 VcH2
HDrv1
Vcc
LDrv1
1N4148
Q2
Q3
L1
VOUT1
C6
C1
V OUT3
R1
C2
R2
C3 R3
C4 R4
VOUT3
U1 PGnd
Fb3
APU3048
Comp1
Fb1
Fb2
Comp2
HDrv2
LDrv2
1N4148
Q4
Q5
R5
R6
L2
VOUT2
R7 C7
SS
C5
Gnd
R8
Figure 1 - Typical application of APU3048 configured as 2-independent converter.
PACKAGE ORDER INFORMATION
TA (°C)
0 To 70
0 To 70
DEVICE
APU3048O
APU3048M
PACKAGE
16-Pin TSSOP
16-Pin SOIC NB
Data and specifications subject to change without notice.
200308072-1/15
1 page  
APU3048
THEORY OF OPERATION
Introduction
The APU3048 is designed for multi-outputs applications.
It includes two synchronous buck controllers and a lin-
ear regulator controller. The two synchronous controller
operates with fixed frequency voltage mode and is con-
figured as two independent controllers. The timing of the
IC is provided through an internal oscillator circuit. These
are two out of phase oscillators.
Soft-Start
The APU3048 has a programmable soft start to control
www.DataSheet4U.ctohme output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start se-
quence initiates when the Vcc, VcH1 and VcH2 rise
above their threshold and generates the Power On Re-
set (POR) signal. Soft-start function operates by sourc-
ing an internal current to charge an external capacitor to
about 3V. Initially, the soft-start function clamps the E/
A’s output of the PWM converter. As the charging volt-
age of the external capacitor ramps up, the PWM sig-
nals increase from zero to the point the feedback loop
takes control.
Out of Phase Operation
The APU3048 drives its two output stages 1808 out of
phase. In application with single input voltage, the out of
phase operation reduces the input ripple current. This
results in much smaller RMS current in the input ca-
pacitor and reduction of input capacitors.
Shutdown
The converter can be shutdown by pulling the soft-start
pin below 0.5V. This can be easily done by using an
external small signal transistor. During shutdown the
MOSFET drivers and the LDO controller turn off.
Short-Circuit Protection
The outputs are protected against the short circuit. The
APU3048 protects the circuit for shorted output by sens-
ing the output voltages. The APU3048 shuts down the
PWM signals and LDO controller, when the output volt-
ages drops below the set values.
Under-Voltage Lockout
The under-voltage lockout circuit assures that the
MOSFET driver outputs and LDO controller remain in
the off state whenever the supply voltages drop below
set parameters. Normal operation resumes once the
supply voltages rise above the set values.
APPLICATION INFORMATION
Design Example:
The following example is a typical application for APU3048
in current sharing mode. The schematic is Figure 9 on
page 12.
For Switcher
VIN1 = 12V
VOUT1 = 3.3V
IOUT1 = 4A
VIN2 = 5V
VOUT2 = 1.8V
IOUT2 = 4A
DVOUT = 75mV
fS = 200KHz
For Linear Regulator
VIN3 = 3.3V
VOUT3 = 2.5V
IOUT3 = 2A
PWM Section
( )VOUT1 = VREF3
R6
1+ R8
---(1)
When an external resistor divider is connected to the
output as shown in Figure 3.
VOUT1
APU3048
Fb1
R6
R8
Figure 3 - Typical application of the APU3048 for
programming the output voltage.
Output Voltage Programming
Output voltage is programmed by reference voltage and
external voltage divider. The Fb1 pin is the inverting input
of the error amplifier, which is internally referenced to
1.25V. The divider is ratioed to provide 1.25V at the Fb1
pin when the output is at its desired value. The output
voltage is defined by using the following equation:
Equation (1) can be rewritten as:
( )R6 = R8 3 VOUT1 - 1
VREF
Will result to:
VOUT1=3.3V
VREF=1.25V
R8=1K, R6=1.64K
VOUT2=1.8V
VREF=1.25V
R15=1K, R14=442V
5/15
5 Page 
APU3048
Layout Consideration
The layout is very important when designing high fre-
quency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
Start to place the power components, make all the con-
nection in the top layer with wide, copper filled areas.
The inductor, output capacitor and the MOSFET should
be close to each other as possible. This helps to reduce
the EMI radiated by the power traces due to the high
switching currents through them. Place input capacitor
www.DataSheet4U.com
TYPICAL APPLICATION
12V to 3.3V @ 4A
12V to 1.8V @ 4A
3.3V to 2.5V @ 2A
directly to the drain of the high-side MOSFET, to reduce
the ESR replace the single input capacitor with two par-
allel units. The feedback part of the system should be
kept away from the inductor and other noise sources,
and be placed close to the IC. In multilayer PCB use
one layer as power ground plane and have a control cir-
cuit ground (analog ground), to which all signals are ref-
erenced. The goal is to localize the high current path to
a separate loop that does not interfere with the more
sensitive analog control function. These two grounds
must be connected together on the PC board layout at a
single point.
12V
C2
33uF
L1
1uH
D1
BAT54S
C3
0.1uF
C1
1uF
C8
1uF
VcH1
Vcc
VcH2
HDrv1
3.3V
C9
47uF
2.5V @ 2A
C14
1uF
R2
Q1 10V
IRLR2703
R5
1K
C15
47uF
R7
1K
VOUT3
LDrv1
PGnd
Fb3 U1 Fb1
APU3048
C18
1800pF
R9
43.2K
Comp1
HDrv2
C19
3900pF
R11
16.2K
C24
0.1uF
Comp2
SS
Gnd
LDrv2
Fb2
1N4148
C6
47uF
C7
1uF
1/2 of Q2
IRF7313
1/2 of Q2
IRF7313
L3
10uH
C10
470pF
R4
4.7V
C11, C12
2x 150uF
R6
1.65K
1N4148
C16
47uF
C17
1uF
1/2 of Q3
IRF7313
1/2 of Q3
IRF7313
L4
6.8uH
C20
470pF
R13
4.7V
R8
1K
C21, C22
2x 150uF
R14
442V
R15
1K
3.3V @ 4A
C13
1uF
1.8V @ 4A
C23
1uF
Figure 8 - Typical application of APU3048 in an on-board DC-DC converter
using a single 12V supply for switcher.
11/15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet APU3048.PDF ] | |
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