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Número de pieza | AT25DF641 | |
Descripción | 64-Megabit 2.7-volt Minimum SPI Serial Flash Memory | |
Fabricantes | ATMEL Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de AT25DF641 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! Features
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• Serial Peripheral Interface (SPI) Compatible
– Supports SPI Modes 0 and 3
– Supports RapidS® Operation
– Supports Dual-Input Program and Dual-Output Read
• Very High Operating Frequencies
– 100 MHz for RapidS
– 85 MHz for SPI
– Clock-to-Output (tV) of 5 ns Maximum
• Flexible, Optimized Erase Architecture for Code + Data Storage Applications
– Uniform 4-Kbyte Block Erase
– Uniform 32-Kbyte Block Erase
– Uniform 64-Kbyte Block Erase
– Full Chip Erase
• Individual Sector Protection with Global Protect/Unprotect Feature
– 128 Sectors of 64-Kbytes Each
• Hardware Controlled Locking of Protected Sectors via WP Pin
• Sector Lockdown
– Make Any Combination of 64-Kbyte Sectors Permanently Read-Only
• 128-Byte Programmable OTP Security Register
• Flexible Programming
– Byte/Page Program (1 to 256 Bytes)
• Fast Program and Erase Times
– 1.0 ms Typical Page Program (256 Bytes) Time
– 50 ms Typical 4-Kbyte Block Erase Time
– 250 ms Typical 32-Kbyte Block Erase Time
– 400 ms Typical 64-Kbyte Block Erase Time
• Program and Erase Suspend/Resume
• Automatic Checking and Reporting of Erase/Program Failures
• Software Controlled Reset
• JEDEC Standard Manufacturer and Device ID Read Methodology
• Low Power Dissipation
– 5 mA Active Read Current (Typical at 20 MHz)
– 5 µA Deep Power-Down Current (Typical)
• Endurance: 100,000 Program/Erase Cycles
• Data Retention: 20 Years
• Complies with Full Industrial Temperature Range
• Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
– 16-Lead SOIC (300-mil wide)
– 8-Contact Very Thin DFN (6 x 8 mm)
64-Megabit
2.7-volt
Minimum
SPI Serial Flash
Memory
AT25DF641
Preliminary
See applicable errata
in Section 18.
1. Description
The AT25DF641 is a serial interface Flash memory device designed for use in a wide
variety of high-volume consumer based applications in which program code is shad-
owed from Flash memory into embedded or external RAM for execution. The flexible
erase architecture of the AT25DF641, with its erase granularity as small as 4-Kbytes,
makes it ideal for data storage as well, eliminating the need for additional data storage
EEPROM devices.
3680E–DFLASH–12/08
1 page 3. Block Diagram
www.DataSheet4U.com
Figure 3-1. Block Diagram
CS
SCK
SI (SIO)
SO (SOI)
WP
HOLD
INTERFACE
CONTROL
AND
LOGIC
AT25DF641 [Preliminary]
CONTROL AND
PROTECTION LOGIC
Y-DECODER
X-DECODER
I/O BUFFERS
AND LATCHES
SRAM
DATA BUFFER
Y-GATING
FLASH
MEMORY
ARRAY
4. Memory Array
To provide the greatest flexibility, the memory array of the AT25DF641 can be erased in four lev-
els of granularity including a full chip erase. In addition, the array has been divided into physical
sectors of uniform size, of which each sector can be individually protected from program and
erase operations. The size of the physical sectors is optimized for both code and data storage
applications, allowing both code and data segments to reside in their own isolated regions. The
Memory Architecture Diagram illustrates the breakdown of each erase level as well as the
breakdown of each physical sector.
3680E–DFLASH–12/08
5
5 Page AT25DF641 [Preliminary]
the device will continue reading back at the beginning of the array (000000h). No delays will be
www.DataSheet4U.com incurred when wrapping around from the end of the array to the beginning of the array.
Deasserting the CS pin will terminate the read operation and put the SO and SIO pins into a
high-impedance state. The CS pin can be deasserted at any time and does not require that a full
byte of data be read.
Figure 7-4. Dual-Output Read Array
CS
SCK
SIO
SO
0 1 2 3 4 5 6 7 8 9 10 11 12
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
OPCODE
ADDRESS BITS A23-A0
DON'T CARE
OUTPUT
DATA BYTE 1
OUTPUT
DATA BYTE 2
00 111011AAAAAA
MSB MSB
A A A X X X X X X X X D6 D4 D2 D0 D6 D4 D2 D0 D6 D4
MSB
HIGH-IMPEDANCE
D7 D5 D3 D1 D7 D5 D3 D1 D7 D5
MSB MSB MSB
3680E–DFLASH–12/08
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet AT25DF641.PDF ] |
Número de pieza | Descripción | Fabricantes |
AT25DF641 | 64-Megabit 2.7-volt Minimum SPI Serial Flash Memory | ATMEL Corporation |
AT25DF641A | 2.7V Minimum SPI Serial Flash Memory | Adesto |
AT25DF641A | 64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory | ATMEL Corporation |
AT25DF641A-MH-T | 2.7V Minimum SPI Serial Flash Memory | Adesto |
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