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PDF ADP3417 Data sheet ( Hoja de datos )

Número de pieza ADP3417
Descripción Dual Bootstrapped MOSFET Driver
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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All-In-One Synchronous Buck Driver
Bootstrapped High Side Drive
One PWM Signal Generates Both Drives
Anticross-Conduction Protection Circuitry
APPLICATIONS
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
Standard-to-Synchronous Converter Adaptations
Dual Bootstrapped
MOSFET Driver
ADP3417
FUNCTIONAL BLOCK DIAGRAM
VCC
BST
IN
OVERLAP
PROTECTION
CIRCUIT
ADP3417
PGND
DRVH
SW
DRVL
GENERAL DESCRIPTION
The ADP3417 is a dual MOSFET driver optimized for driving
two N-channel MOSFETs which are the two switches in a
nonisolated synchronous buck power converter. Each of the
drivers is capable of driving a 3000 pF load with a 20 ns propa-
gation delay and a 30 ns transition time. One of the drivers can
be bootstrapped and is designed to handle the high voltage
slew rate associated with floatinghigh side gate drivers.
The ADP3417 includes overlapping drive protection (ODP)
to prevent shoot-through current in the external MOSFETs.
The ADP3417 is specified over the commercial temperature
range of 0°C to 70°C and is available in an 8-lead SOIC package.
ADP3417
IN
VCC
12V
D1
BST
CBST
DRVH
SW
Q1
DELAY
1V
DRVL
TO
INDUCTOR
Q2
PGND
1V
Figure 1. General Application Circuit
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

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ADP3417 pdf
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2
T
IN
DRVH
DRVL
TPC 1. DRVH Fall and DRVL
Rise Times
Typical Performance Characteristics–ADP3417
IN
3
DRVH
1
DRVL
T
60
VCC = 12V
CLOAD = 3nF
50
40
DRVH
2
TPC 2. DRVL Fall and DRVH
Rise Times
30
DRVL
20
0
25 50 75 100
JUNCTION TEMPERATURE – ؇C
125
TPC 3. DRVH and DRVL Rise Times
vs. Temperature
28
VCC = 12V
CLOAD = 3nF
26
24
22
DRVL
DRVH
20
0
25 50 75 100
JUNCTION TEMPERATURE – ؇C
125
TPC 4. DRVH and DRVL Fall Times
vs. Temperature
70
TA = 25؇C
VCC = 12V
60
DRVH
50
40
DRVL
30
20
10
12345
LOAD CAPACITANCE – nF
TPC 5. DRVH and DRVL Rise Times
vs. Load Capacitance
28
TA = 25؇C
VCC = 12V
26
24
DRVL
22
DRVH
20
18
16
14
1 2 345
LOAD CAPACITANCE – nF
TPC 6. DRVH and DRVL Fall Times
vs. Load Capacitance
60
TA = 25؇C
VCC = 12V
50 CLOAD = 3nF
40
30
20
10
0
0 200 400 600 800 1000 1200
IN FREQUENCY – kHz
TPC 7. Supply Current vs.
Frequency
16
VCC = 12V
CLOAD = 3nF
fIN = 250kHz
15
14
13
12
0 25 50 75 100 125
JUNCTION TEMPERATURE – ؇C
TPC 8. Supply Current vs.
Temperature
REV. A
–5–

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