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Número de pieza | ICS664-02 | |
Descripción | PECL Digital Video Clock Source | |
Fabricantes | Integrated Circuit Systems | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ICS664-02 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
No Preview Available ! ICS664-02
PECL Digital Video Clock Source
Description
The ICS664-02 provides clock generation and
www.dactaosnhveeetr4sui.oconmfor clock rates commonly needed in HDTV
digital video equipment. The ICS664-02 uses the latest
Phase-Locked Loop (PLL) technology to provide
excellent phase noise and long-term jitter performance
for superior synchronization and S/N ratio.
For audio sampling clocks generated from 27 MHz, use
the ICS661.
Please contact ICS if you have a requirement for an
input and output frequency not included in this
document. ICS can rapidly modify this product to meet
special requirements.
Features
• Packaged in 16-pin TSSOP
• Available in Pb (lead) free package
• Clock or crystal input
• Low phase noise
• Low jitter
• Exact (0 ppm) multiplication ratios
• Power-down control
• Improved phase noise over ICS660
• Differential outputs
• Supports SMTE 292M HD-SDI standard for HDTV
broadcast
Block Diagram
X2
X1/REFIN
SELIN
S3:0 4
VDD (P2)
Crystal
Oscillator
GND (P6)
VDD (P3) VDDO
VDD (P10)
PLL Clock
Synthesis
GND (P5)
CLK
CLK
GND (P12)
MDS 664-02 C
1
Revision 062304
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
1 page ICS664-02
PECL Digital Video Clock Source
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min. Typ.
www.datasheet4u.cCormystal Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Duty Cycle
Power-up Time
tOR 20% to 80%, 15 pF load
tOF 80% to 20%, 15 pF load
tOD at VDD/2, 15 pF load
40 49 to 51
tPU
Inputs out of PD state
to clocks stable
Power-down Time
tPD
Inputs in PD state to
clocks off
Jitter, Short term
70
Jitter, Long term
10 µs delay
300
Single Sideband Phase
Noise
10 kHz offset
-120
Actual Mean Frequency
Error versus Target
0
Max.
28
1.5
1.5
60
10
1
Units
MHz
ns
ns
%
ms
µs
ps p-p
ps p-p
dBc
ppm
Thermal Characteristics
Parameter
Symbol Conditions
Thermal Resistance Junction to
Ambient
θJA Still air
θJA 1 m/s air flow
θJA 3 m/s air flow
Thermal Resistance Junction to Case θJC
Min.
Typ.
78
70
68
37
Max.
Units
°C/W
°C/W
°C/W
°C/W
MDS 664-02 C
5
Revision 062304
Integrated Circuit Systems, Inc.● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet ICS664-02.PDF ] |
Número de pieza | Descripción | Fabricantes |
ICS664-01 | Digital Video Clock Source | Integrated Circuit Systems |
ICS664-02 | PECL Digital Video Clock Source | Integrated Circuit Systems |
ICS664-03 | Digital Video Clock Source | Integrated Circuit Systems |
ICS664-04 | PECL Digital Video Clock Source | Integrated Circuit Systems |
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