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PDF ADN2526 Data sheet ( Hoja de datos )
| Número de pieza | ADN2526 | |
| Descripción | 11.3 Gbps Active Back-Termination Differential Laser Diode Driver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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11.3 Gbps Active Back-Termination,
Differential Laser Diode Driver
ADN2526
FEATURES
3.3 V operation
Up to 11.3 Gbps operation
Typical 24 ps rise/fall times
Full back-termination of output transmission lines
Drives TOSAs with resistances ranging from 5 Ω to 50 Ω
Bias current range: 10 mA to 100 mA
Differential modulation current range: 10 mA to 80 mA
Voltage input control for bias and modulation currents
Data inputs sensitivity: 150 mV p-p diff
Automatic laser shutdown (ALS)
Cross point adjustment (CPA)
XFP-compliant bias current monitor
SFP+ MSA compliant
Optical evaluation board available
Compact 3 mm × 3 mm LFCSP
APPLICATIONS
SONET OC-192 and SDH STM-64 optical transceivers
10 Gb Fibre Channel transceivers
10 Gb Ethernet optical transceivers
SFP+/XFP/X2/XENPAK/XPAK/MSA 300 optical modules
GENERAL DESCRIPTION
The ADN2526 laser diode driver is designed for direct modula-
tion of packaged laser diodes that have a differential resistance
ranging from 5 Ω to 50 Ω. The active back-termination in the
ADN2526 absorbs signal reflections from the TOSA end of the
output transmission lines, enabling excellent optical eye quality to
be achieved even when the TOSA end of the output transmission
lines is significantly misterminated. ADN2526 is an SFP+ MSA-
compliant device, and its small package and enhanced ESD
protection provide the optimum solution for compact modules
where laser diodes are packaged in low pin-count optical
subassemblies.
The modulation and bias currents are programmable via the
MSET and BSET control pins. By driving these pins with control
voltages, the user has the flexibility to implement various
average optical power and extinction ratio control schemes,
including closed-loop or look-up table control. The automatic
laser shutdown (ALS) feature allows the user to turn on/off the
bias and modulation currents by driving the ALS pin with a
LVTTL logic source.
The product is available in a space-saving 3 mm × 3 mm LFCSP
specified from −40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
VCC
CPA
ALS
VCC
VCC ADN2526
DATAP
DATAN
50Ω
50Ω
GND
CROSS
POINT
ADJUST
50Ω IMOD
VCC
800Ω
800Ω
IMODP
IMODN
IBMON
IBIAS
200Ω
200Ω
200Ω 2Ω
MSET
VEE
BSET
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page  
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ADN2526
VEE VEE
VEE
VBSET
GND
1kΩ 10Ω
TP1 TP2
10nF
GND
BSET IBMON IBIAS VEE
GND
GND
Z0 = 50Ω 10nF Z0 = 50Ω
VCC
VCC
ADN2526
GND
Z0 = 25Ω
35Ω Z0 = 50Ω
BIAS
TEE
GND
50Ω
J2
DATAP
IMODP
ADAPTER ATTENUATOR
GND GND GND
Z0 = 50Ω 10nF Z0 = 50Ω
J3 DATAN
IMODN
GND 70Ω
GND
Z0 = 25Ω
35Ω Z0 = 50Ω
GND
GND
GND
VCC
GND MSET CPA
VCC
ALS VEE
GND
GND
GND
BIAS
TEE
GND
OSCILLOSCOPE
ADAPTER ATTENUATOR
50Ω
GND
VMSET
VEE
VCPA
J8
VEE
10nF
VEE
J5 22µF
GND
VEE
GND GND
GND
BIAS TEE: PICOSECOND PULSE LABS MODEL 5542-219
ADAPTER: PASTERNACK PE-9436 2.92mm FEMALE-TO-FEMALE ADAPTER
ATTENUATOR: PASTERNACK PE-7046 2.92mm 20dB ATTENUATOR
Figure 3. High Speed Characterization Circuit
Rev. A | Page 5 of 16
5 Page 
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IBIAS
VCC
VCC
2kΩ
100Ω
2Ω
Figure 21. Equivalent Circuit of the IBIAS Pin
VCC
VCC
500Ω
VCC
100Ω
IBMON
Figure 22. Equivalent Circuit of the IBMON Pin
The recommended configuration for BSET, IBIAS, and IBMON
is shown in Figure 23.
TO LASER CATHODE
VBSET
IBIAS
ADN2526
BSET IBMON
GND
L IBIAS
IBMON
R
1kΩ
Figure 23. Recommended Configuration for the BSET, IBIAS, and IBMON Pins
The circuit used to drive the BSET voltage must be able to drive
the 1 kΩ input resistance of the BSET pin. For proper operation
of the bias current source, the voltage at the IBIAS pin must be
between the compliance voltage specifications for this pin over
supply, temperature, and bias current range (see Table 1). The
maximum compliance voltage is specified for only two bias
current levels (10 mA and 100 mA), but it can be calculated for
any bias current by
VCOMPLIANCE_MAX (V) = VCC (V) − 0.75 − 4.4 × IBIAS
(1)
See the Applications Information section for examples of
headroom calculations.
The function of the inductor, L, is to isolate the capacitance of
the IBIAS output from the high frequency signal path. For
recommended components, see Table 7.
AUTOMATIC LASER SHUTDOWN (ALS)
The ALS pin is a digital input that enables/disables both the bias
and modulation currents, depending on the logic state applied,
as shown in Table 5.
ADN2526
Table 5. ALS Functions
ALS Logic State
High
Low
Floating
IBIAS and IMOD
Disabled
Enabled
Enabled
The ALS pin is compatible with 3.3 V CMOS and LVTTL logic
levels. Its equivalent circuit is shown in Figure 24.
VCC
VCC
ALS
100Ω
40kΩ
2kΩ
Figure 24. Equivalent Circuit of the ALS Pin
MODULATION CURRENT
The modulation current can be controlled by applying a dc
voltage to the MSET pin. This voltage is converted into a dc
current by using a voltage-to-current converter using an
operational amplifier and a bipolar transistor, as shown in
Figure 25.
VCC
FROM INPUT STAGE
MSET
800Ω
50Ω IMOD
IMODP
IMODN
gm × VO
VO
200Ω
GND
ADN2526
Figure 25. Generation of Modulation Current on the ADN2526
This dc current is switched by the data signal applied to the
input stage (DATAP and DATAN pins) and amplified by the
output stage to generate the differential modulation current at
the IMODP and IMODN pins.
The output stage also generates the active back-termination,
which provides proper transmission line termination. Active
back-termination uses feedback around an active circuit to
synthesize a broadband termination resistance. This provides
excellent transmission line termination, while dissipating less
power than a traditional resistor passive back-termination.
A small portion of the modulation current flows in the virtual
50 Ω active back-termination resistor. All of the preset IMOD
modulation current, the range specified in Table 1, flows into
the external load. The equivalent circuits for MSET, IMODP, and
IMODN are shown in Figure 26 and Figure 27. The two 25 Ω
resistors in Figure 27 are not actual resistors. They represent the
active back-termination resistance.
Rev. A | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADN2526.PDF ] | |
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