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LC82101 PDF даташит

Спецификация LC82101 изготовлена ​​​​«Sanyo Semicon Device» и имеет функцию, называемую «Image Processing Circuit for FAX/ Copier/ and OCR Products».

Детали детали

Номер произв LC82101
Описание Image Processing Circuit for FAX/ Copier/ and OCR Products
Производители Sanyo Semicon Device
логотип Sanyo Semicon Device логотип 

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LC82101 Даташит, Описание, Даташиты
Ordering number : EN*4982A
Preliminary
CMOS LSI
LC82101
Image Processing Circuit
for FAX, Copier, and OCR Products
Overview
The LC82101 converts an analog image signal from a
CCD or contact sensor to high-quality binary image data.
The LC82101 uses an internal 8-bit A/D converter for
A/D conversion, and in addition to the orthodox dithering
technique, also supports an error diffusion technique that
allows an even higher quality image to be acquired. These
techniques apply to the whole range of processing
supported by the LC82101, including full-pixel distortion
correction, gamma conversion for arbitrary gamma
curves, image compression processing, two-dimensional
filtering, halftone processing, and image separation
processing to separate documents into text, photograph,
and halftone regions. Thus this LSI implements the image
processing required by FAX, copier, and OCR systems.
Features
• Number of pixels processed
2048 pixels/line (64 KB memory, white correction only)
4096 pixels/line (256 KB memory, both white and black
correction)
8192 pixels/line (256 KB memory, white correction
only)
• Processing speed
500 ns/pixel maximum (The processing time for 1 pixel
is 16/SYSCLK.)
• Supports medium speed products with a single external
memory chip
100 ns access time memory allows 800 ns/pixel
processing, and 60 ns access time memory allows
500 ns/pixel processing.
• AGC (The A/D converter high-level reference voltage is
varied from 1.2 to 4.2 V in 0.2 V steps.)
• Built-in 8-bit A/D converter (includes a sensor signal
delay adjustment function)
• Sensor drive circuit (supports CCD and all CIS types)
• Digital clamp (single-point clamp, even/odd clamp)
• Distortion correction (white correction, black correction,
full-pixel correction)
• Gamma correction (supports user-defined curves)
• Image area separation (text, photographs, halftone)
• Simple binary-conversion processing (fixed threshold
level, density-adaptive threshold level)
• Halftone processing
Structural dithering (64 levels), settable dithering
threshold level
Error diffusion technique (64 levels)
• Image reduction (thinning, fine black line retaining, fine
white line retaining)
• Single-voltage 5 V supply and low power due to CMOS
process fabrication
Package Dimensions
unit: mm
3174-QFP80E
[LC82101]
SANYO: QIP80E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
63095HA (OT) No. 4982-1/5









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LC82101 Даташит, Описание, Даташиты
Block Diagram
LC82101
Pin Functions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
DREQ
ACK
PD0
PD1
PD2
PD3
PD4
PD5/SDE
PD6/SDCK
PD7/SD
MD0
DVDD
DGND
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DGND
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, NC: No connection
I/O Function
O DMA data request signal output
I DMA acknowledge signal input
O
O Binary image data parallel data bus
O The data order is set by the MSBF register.
O
O
O Pin 8 can be switched to function as the serial data output valid period signal.
O Pin 9 can be switched to function as the serial data transfer clock.
O Pin 10 can be switched to function as the serial data output.
B External memory data bus
P Digital system power supply
P Digital system ground
B
B
B
B
External memory data bus
MD7 is the MSB and MD0 is the LSB.
B
B
B
P Digital system ground
O
O
O
O
O
External memory address
MA14 is the MSB and MA0 is the LSB.
O
O
O
O
Continued on next page.
No. 4982-2/5









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LC82101 Даташит, Описание, Даташиты
LC82101
Continued from preceding page.
Pin No.
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Symbol
DVDD
DGND
MA9
MA10
MA11
MA12
MA13
MA14
MCS
MRD
MWR
DGND
MTP
SH
RS
CLK1
CLK2
CLK3
SAMP
CLKIN
DVDD
DGND
NC
NC
NC
TEST
AGND
ATAP
AIN
TEMP
AVDD
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
RA0
RA1
RA2
DVDD
DGND
RA3
RA4
CS
READ
WRITE
RESET
I/O
P
P
O
O
O
O
O
O
O
O
O
P
O
O
O
O
O
O
O
I
P
P
NC
NC
NC
I
P
O
I
I
P
B
B
B
B
B
B
B
B
I
I
I
P
P
I
I
I
I
I
I
Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, NC: No connection
Function
Digital system power supply
Digital system ground
External memory address bus
MA14 is the MSB and MA0 is the LSB.
External memory CS signal
External memory READ signal
External memory WRITE signal
Digital system ground
Motor drive timing signal output
Sensor drive signal outputs
Sampling clock monitor
System clock input
Digital system power supply
Digital system ground
Test input (Connect to ground in normal use.)
Analog system ground
Analog mid-level connection
Sensor signal input
Temperature signal input
Analog system power supply
CPU interface data bus
RD7 is the MSB and RD0 is the LSB.
CPU interface address bus
RA4 is the MSB and RA0 is the LSB.
Digital system power supply
Digital system ground
CPU interface address bus
CPU interface CS signal
CPU interface READ signal
CPU interface WRITE signal
System reset
No. 4982-3/5










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