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LC82151 PDF даташит

Спецификация LC82151 изготовлена ​​​​«Sanyo Semicon Device» и имеет функцию, называемую «Single-Chip Facsimile Controller».

Детали детали

Номер произв LC82151
Описание Single-Chip Facsimile Controller
Производители Sanyo Semicon Device
логотип Sanyo Semicon Device логотип 

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LC82151 Даташит, Описание, Даташиты
No. *5601
CMOS LSI
LC82151
Single-Chip Facsimile Controller
Preliminary
Overview
The LC82151 is a facsimile controller that integrates the
main functions required by facsimile systems on a single
chip. The LC82151 includes a FAX modem with ADPCM
and HDLC functions, image processing functions that can
create high-quality binary image data without external
memory, a CODEC accelerator, a CPU and CPU
peripheral circuits, general-purpose I/O ports, and other
functions. A facsimile system with excellent cost-
performance characteristics can be created easily by
providing ROM and RAM.
Functions
• CPU and peripheral circuits
– High-speed 16-bit CPU (65C816) operating at
7.4 MHz
– 16-MB program address space
– CODEC accelerator
– Two-channel DMA controller
– Four 16-bit timers
– 16-bit watchdog timer
– TPH interface
– Serial I/O interface
– Parallel I/O: 10 to 43 pins
• Image processing
– Processes 2048 pixels per line
– Processing speed: 540 ns per pixel (maximum)
– Built-in 8-bit A/D converter (Includes a sensor signal
delay function.)
– Sensor drive circuit (Supports CCDs and all major
CIS devices.)
– Distortion correction (White distortion: 8-pixel
averaging correction, black correction: Allows the
black correction subtraction data to be set.)
γ-correction (Supports user-defined correction curves.)
– Simple binary conversion processing (fixed threshold
and density-adaptive threshold)
– Halftone processing error diffusion method (64 levels)
– Image reduction (decimation, fine black line retention,
and fine white line retention)
• Modem
– Group 3 FAX modem
ITU-T V.29 (9600, 7200, and 4800 bps)
ITU-T V.27ter (4800 and 2400 bps)
ITU-T V.21ch2 (300 bps)
– Simultaneous high/low-speed wait function
– Short training function (ITU-T V.27ter only)
– HDLC function (for all transmission speeds)
– Synthesizer function
– Caller ID function
Bell 202 (1200 bps)
ITU-T V.23 (1200 bps)
– ADPCM function
Encoding: 2, 3, or 4 bits
Sampling frequencies: 9.6, 7.2, 4.8, and 3.6 kHz
– RTC low-voltage backup
– 5-V single-voltage power supply
Package Dimension
unit: mm
3214-SQFP144
[LC82151]
SANYO: SQFP144
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
43097 (OT) No. 5601-1/8









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LC82151 Даташит, Описание, Даташиты
Block Diagram
LC82151
AIN, ATAP, TEMP, SH, RS, ACLK1,
ACLK2, ASAMP, DAREFH, DAREFL
Ø2, RES, R/W,
IRQ, VP, RDY,
BE, NMI, VPA,
VDA, ABCNT
RD, WR
ROMCS, RAMCS,
IOCS, MCS
BREQ, BACK, EXRDY
PA7 to PA0
PB2 to PB0
CPU
65C816
CPU
interface
PIO
Image
processing
Modem
CODEC
accelerator
TO0
TO1
RTC, CTS,
DSR, DTR,
RI, DCD
TD, RD
Timer
SIO
RTC
DMAC
WDT
PCK/SCLK,
PDATA/TXD,
EXCLK,
LATCH/RXD,
STB0 to STB3,
HVON
PROTECT
TPH interface
XTAL1, XTAL2,
XOUT,CLKIN,
RESET,
BACKUP
TEST2 to TEST0
TESTOUT
D7 to D0
A19 to A0
Interrupt
controller
DRAM
controller
PXD7 to PXD0
PDREQ, PDACK
TXA, RXA,
PGCO, PGCI, VREF,
RIN, VCOI, PHASEO,
EYED, EYECLK,
EYESYNC
ROSC1
ROSC2
INT2
INT8
RAS
CAS
No. 5601-2/8









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LC82151 Даташит, Описание, Даташиты
LC82151
Pin Assignment
I Input pins
O Output pins
Type
B Bidirectional pins NC No connection
P Power pins
Pin No.
Pin
1 VSS
2 VP
3 RDY
4 VPA
5 VDA
6 A19
7 A18
8 A17
9 A16
10 D7
11 D6
12 D5
13 D4
14 D3
15 D2
16 D1
17 D0
18 VDD
19 VSS
20 RD
21 WR
22 ROMCS
23 RAMCS
24 IOCS
25 MCS
26 RAS/PG1
27 CAS/PG2
28 PA7
29 PA6
30 PA5
31 PA4
32 PA3
33 PA2
34 PA1
35 PA0
36 VSS
37 VDD
38 RIN
39 PHASEO
40 VCOI
41 INT8/PB7
42 INT2/PB6
43 BACK/PB5
44 BREQ/PB4
45 EXRDY/PB3
46 PB2
47 PB1
48 PB0
49 NMI
50 TEST2
I/O Pin function
P Ground
I ICE vector address signal
O ICE ready signal
I ICE valid program address signal
I ICE valid data address signal
O
O
Address bus
O
O
B
B
B
B
Data bus
B
B
B
B
P Power supply
P Ground
O Read signal from the CPU
O Write signal from the CPU
O Program ROM chip select signal
O Working RAM chip select signal
O External I/O chip select signal
O External I/O chip select signal
B DRAM row address strobe/general-purpose port G
B DRAM column address strobe/general-purpose port G
B
B
B
B
General-purpose port A
B
B
B
B
P Ground
P Power supply
I PLL bias input
O PLL phase detector output
I PLL voltage-controlled oscillator input
B
External interrupt request signal/general-purpose port B
B
B CPU bus acknowledge signal/general-purpose port B
B CPU bus request signal/general-purpose port B
B External ready input/general-purpose port B
B
B General-purpose port B
B
I Non-maskable interrupt request signal
I Test pin
Continued on next page.
No. 5601-3/8










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LC82151Single-Chip Facsimile ControllerSanyo Semicon Device
Sanyo Semicon Device

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