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PDF AMMP-6130 Data sheet ( Hoja de datos )
| Número de pieza | AMMP-6130 | |
| Descripción | 30 GHz Power Amplifier with Frequency Multiplier | |
| Fabricantes | AVAGO TECHNOLOGIES | |
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AMMP-6130
30 GHz Power Amplifier with Frequency Multiplier (x2)
in SMT Package
Data Sheet
www.DataSheet4U.com
Description
Avago Technologies AMMP-6130 is a high gain,
narrowband doubler and output power amplifier
designed for DBS applications and other commercial
communication systems. The MMIC takes an input 15
GHz signal and passes it through a harmonic frequency
multiplier (x2) and then three stages of power
amplification. Integrated matching structures filter and
match input/output to 50 Ω. It has integrated input
and output DC blocking capacitors and bias structures
to all stages. The MMIC is fabricated using PHEMT
technology. The backside of this package part is both
RF and DC ground. This helps simply the assembly
process and reduces assembly related performance
variations and costs. The surface mount package allows
elimination of “chip & wire” assembly for lower cost.
This MMIC is a cost effective alternative to hybrid
(discrete-FET) amplifiers that require complex tuning
and assembly process.
Surface Mount Package, 5.0 x 5.0 x 1.25 mm
Pin Connections (Top View)
1 23
Pin Function
1
2 Vd
3
4 RF Out
5
8 X2
46
7
8 RF In
Features
• 5x5 mm Surface Mount Package
• Integrated DC Block and Choke
• 50 Ω Input and Output Match
• Single Positive Supply Pin
• No Negative Gate Bias
Specifications (Vd=4.5V, Idd=200mA)
• Frequency Range 15GHz in, 30GHz out
• Output Power: 21 dBm
• Harmonic Suppression: 60dBc
• Single Positive Supply
• DC Requirements: 4.5V, 200mA
Applications
• Microwave Radio systems
• Satellite VSAT, DBS Up/Down Link
• Broadband Wireless Access)
765
PACKAGE
BASE
GND
Note: These devices are ESD sensitive. The following precautions are strongly recommended. Ensure
that an ESD approved carrier is used when units are transported from one destination to another.
Personal grounding is to be worn at all times when handling these devices. The manufacturer
assumes no responsibilities for ESD damage due to improper storage and handling of these devices.
1 page  
Biasing and Operation
The AMMP-6130 frequency doubler has been designed
with a fully integrated self bias network; thus, requiring
only a single 4.5v bias input with a typical current draw
of 200mA.
The one-stage frequency doubler relies on the non-
linear behavior of the FET to produce the doubled
signal at the output. A high-pass filter at the input
shorts any reflected 2nd harmonic signal to ground.
The input also consists of matching components tuned
to 15GHz. An additional LC-filter is included at the
input for stability. The doubler is operated at pinch-
off to create a half-wave conduction angle ideal for
generation of the 2nd harmonic. The AMMP-6130 is
also designed for stability over temperature.
www.DataSheet4U.com
Figure 8. Evaluation / Test Board (Available to qualified
customer requests)
C
C3
C
C2
Port
Input_15G
MLOC
TL8
MLIN
TL4
Port
Vd1
MLIN
TL10
MLIN
Port TL11
Vd2
MLIN
TL12
MLIN
TL3
MLIN
TL2
MLIN
HP_FTELT7
HPFET1
CC R
C9 C10 R1
C MLIN MLIN
HPC_5FET
TL21
TL15
HPFET2
C MLIN MLIN
C4
TL20
MLINTL14
TL17
MLIN
TL18
MLOC
TL9
CC R
R
C11 C12 R5
R
R2 R3
C
HP_CF6ET
HPFET3
MLIN
TL22
MLIN
TL16
MLIN
TL19
C C C CR
C15C13 C14C16R6
R
R4
MLIN
TL13
C
HP_FET C7
HPFET4
Port
Output_30G
Figure 9. Simplified Doubler-Amplifier Schematic
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet AMMP-6130.PDF ] | |
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