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PDF AL4CE225 Data sheet ( Hoja de datos )
| Número de pieza | AL4CE225 | |
| Descripción | 18-bit Synchronous Fifo | |
| Fabricantes | AverLogic Technologies | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AL4CE225 (archivo pdf) en la parte inferior de esta página. Total 25 Páginas | ||
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AL4CE205
AL4CE215
AL4CE225
AL4CE235
AL4CE245
Data Sheets
Version 1.01
1 page  
AL4CE205/AL4CE215/AL4CE225/AL4CE235/AL4CE245
3.0 Applications
• Routers
• ATM switches
• Cable modems
• Wireless base stations
4.0 Chip Information
4.1 Marking Information
AL4CE2x5
X-XX-XX
XXXXX
XXXX
• SONET(Synchronous Optical Network)
multiplexers
• Multimedia systems
• Time base correction (TBC)
Part Number: X = 0, 1, 2, 3, 4 as
AL4CE205, AL4CE215, AL4CE225,
AL4CE235, AL4CE245
Package: XX =
PF: TQFP
TF: STQFP
Speed Grade: XX = -10, -7.5
Version Number: X = A, B, C..
Lot Number
Date Code
4.2 Ordering Information
Two packages are available for AL4CE205/AL4CE215/AL4CE225/AL4CE235/AL4CE245.
Part number
AL4CE205/215/225/235/245 (A-7.5-PF)
AL4CE205/215/225/235/245 (A-7.5-TF)
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5.0 Pin Diagram
Package
64-pin plastic
TQFP(14x14mm)
64-pin plastic
STQFP(10x10mm)
Power Supply
+3.3V±10%
+3.3V±10%
Status
Sample in Nov.,2001
Sample in Nov., 2001
AL4CE205/AL4CE215/AL4CE225/AL4CE235/AL4CE245
April 5, 2002
5
5 Page 
AL4CE205/AL4CE215/AL4CE225/AL4CE235/AL4CE245
updated on the rising edge of RCLK. Likewise, /PAF is asserted and updated on the rising edge of
WCLK. For detail operation timing, please refer timing diagram.
9.0 Memory Operations:
9.1 Inputs and Outputs:
9.1.1 Data Input (D17 – D0)
D17 ~ D0 are 9-bit or 18-bit wide of input data port. During Reset, if IW is LOW, the Input port will
be configured to 18-bit mode and D17 ~ D0 are used. If IW is HIGH, the Input port will be
configured to 9-bit mode and D8 ~ D0 are used.
9.1.2 Data Outputs (Q17-Q0)
Q0-Q17 are data outputs for 18-bit wide data. During Reset, if OW is LOW, the Output port will be
configured to 18-bit mode and Q17 ~ Q0 are used. If IW is HIGH, the Output port will be configured
to 9-bit mode and Q8 ~ Q0 are used.
9.2 Controls:
9.2.1 Reset (/RS)
Reset is asserted whenever the Reset (/RS) input becomes LOW. During reset, both internal read and
write pointers are reset to the first location. A reset is required after power-up before a write operation
can take place. The Half-Full Flag (/HF) and Programmable Almost-Full Flag (/PAF) will be reset to
HIGH after tRSF. The Programmable Almost-Empty Flag (/PAE) will be reset to LOW after tRSF. The
Full Flag (/FF) will reset to HIGH. The Empty Flag (/EF) will reset to LOW. During reset, the output
register is initialized to all zeros and the offset registers are initialized to their default values.
9.2.2 Write Clock (WCLK)
A write cycle is initiated on the rising edge of the Write Clock (WCLK). Data setup and hold times
must be met with respect to the rising edge of WCLK. The Write and Read Clocks can be
asynchronous or coincident.
9.2.3 Write Enable (/WEN)
When the /WEN input is LOW, data may be loaded into the FIFO RAM array on the rising edge of
every WCLK cycle if the device is not full. Data is stored in the memory array sequentially and
independently of any ongoing read operation. When /WEN is HIGH, no new data is written in the
memory array on each WCLK cycle. To prevent data overflow, /FF will go LOW, inhibiting further
write operations. Upon the completion of a valid read cycle, /FF will go HIGH allowing a write to
occur. The /FF flag is updated on the rising edge of WCLK. /WEN is ignored when the FIFO is full.
9.2.4 Read Clock (RCLK)
Data can be read on the outputs on the rising edge of the Read Clock (RCLK), when Output Enable
www.Dat(a/OShEee)t4iUs .sceotmLOW. The Write and Read Clocks can be asynchronous or coincident.
9.2.5 Read Enable (/REN)
When Read Enable (/REN) is LOW, data is loaded from the memory array into the output register on
the rising edge of every RCLK cycle if the device is not empty. When the /REN input is HIGH, the
AL4CE205/AL4CE215/AL4CE225/AL4CE235/AL4CE245
April 5, 2002 11
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet AL4CE225.PDF ] | |
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