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PDF CY2XF23 Data sheet ( Hoja de datos )
| Número de pieza | CY2XF23 | |
| Descripción | High Performance LVDS Oscillator | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CY2XF23
High Performance LVDS Oscillator with
Frequency Margining - I2C Control
High Performance LVDS Oscillator with Frequency Margining - I2C Control
Features
■ Low jitter crystal oscillator (XO)
■ Less than 1 ps typical root mean square (RMS) phase jitter
■ Low-voltage differential signaling (LVDS) output
■ Output frequency from 50 MHz to 690 MHz
■ Frequency margining through I2C bus
■ Factory-configured or field-programmable
■ Integrated phase-locked loop (PLL)
■ Pb-free package: 5.0 × 3.2 mm leadless chip carrier (LCC)
■ Supply voltage: 3.3 V or 2.5 V
■ Commercial and industrial temperature ranges
Logic Block Diagram
Functional Description
The CY2XF23 is a high-performance and high-frequency XO. It
uses a Cypress proprietary low-noise PLL to synthesize the
frequency from an integrated crystal. The output frequency can
be changed using the I2C bus serial interface, allowing easy
frequency margin testing in applications.
The CY2XF23 is available as a factory-configured device or as
a field-programmable device. Factory configured devices are
configured for general use (see Standard and
Application-Specific Factory Configurations) or they can be
customer specific.
CRYSTAL
OSCILLATOR
1
SDA
2
SCL
I2C
INTERFACE
LOW-NOISE
PLL
PROGRAMMABLE
CONFIGURATION
OUTPUT
DIVIDER
4
CLK
5
CLK#
Cypress Semiconductor Corporation • 198 Champion Court
wwwD.DocautamSheenett4NUu.nmebt er: 001-53145 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 14, 2011
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CY2XF23
Programming Description
The CY2XF23 is a programmable device. Before being used in
an application, it must be programmed with the output
frequencies and other variables described in Programming
Variables on page 5. Two different device types are available,
each with its own programming flow. They are described in the
following sections.
Field-Programmable CY2XF23F
Field programmable devices are shipped unprogrammed and
must be programmed before being installed on a printed circuit
board (PCB). Customers use CyClockWizard™ software to
specify the device configuration and generate a joint electron
devices engineering council (JEDEC - extension .jed)
programming file. Programming of samples and prototype
quantities is available using the CyClockWizard software along
with a CY3675-CLKMAKER1 CyClockMaker Clock Programmer
Kit with a CY3675-LCC6A socket adapter. Cypress’s value
added distribution partners also provide programming services.
Field programmable devices are designated with an ‘F’ in the
part number. They are intended for quick prototyping and
inventory reduction. The software and programmer kit hardware
can be downloaded from www.cypress.com by clicking the
hyperlinks above.
Factory-Configured CY2XF23
For ready-to-use devices, the CY2XF23 is available with no field
programming required. Pre-configured devices (see Standard
and Application-Specific Factory Configurations) are available
for samples or orders, or a request for a custom configuration
can be made. All requests are submitted to the local Cypress
Field Application Engineer (FAE) or sales representative. After
the request is processed, the user receives a new part number,
samples, and datasheet with the programmed values. This part
number is used for additional sample requests and production
orders. The CY2XF23 is one-time programmable (OTP).
Programming Variables
Output Frequencies
The CY2XF23 is programmed with up to four independent output
frequencies, which are then selected using the I2C interface. The
device can synthesize frequencies to a resolution of 1 part per
million (ppm), but the actual accuracy of the output frequency is
limited by the accuracy of the integrated reference crystal.
The CY2XF23 has an output frequency range of 50 MHz to
690 MHz, but the range is not continuous. The CY2XF23 cannot
generate frequencies in the ranges of 521 MHz to 529 MHz and
596 MHz to 617 MHz.
Industrial versus Commercial Device Performance
Industrial and commercial devices have different internal
crystals. They have a potentially significant impact on
performance levels for applications requiring the lowest possible
phase noise. CyClockWIzard software allows the user to select
between and view the expected performance of both options.
Table 1. Device Programming Variables
Variable
Output frequency 0
Output frequency 1
Output frequency 2
Output frequency 3
Temperature range (commercial or industrial)
Memory Map
Five fields can be written via the I2C bus. Four frequency words
define the output frequency. As shown in Table 2, each of these
words is a 6-byte field. When writing to a frequency word, all six
bytes should be written. They may be written either as individual
byte writes, or as a block write. The currently selected frequency
word should not be written to. All four words are symmetrical,
meaning that a 6-byte value that is valid for one word is also valid
for any of the other words, and produces the same frequency.
The fifth field is the select byte, located at byte address 40h. The
value written into the two least significant bits determines the
active frequency word. The other bits of the byte are reserved
and must be written with the values indicated in the table. Users
should never write to any address other than the 25 bytes
described here.
Table 2. Frequency Words
Frequency
Word
0
1
2
3
Byte Addresses
(hex)
10h to 15h
16h to 1Bh
1Ch to 21h
22h to 27h
Word Select
(Select Byte 40h)
00
01
10
11
Table 3. Register 40h: Select Byte
Bits
Default Value
(binary)
Name
Description
7:2 000000
Reserved Reserved. Always write
this value.
1:0 User-defined
Word select Selects the Frequency
Word to determine the
output frequency. 00
selects Word 0; 01
selects Word 1; 10
selects Word 2; 11
selects Word 3.
Serial Interface Protocol and Timing
The CY2XF23 uses pins SDA and SCLK for an I2C bus that
operates up to 100 kbits/sec in read or write mode. The
CY2XF23 is always a slave on this bus, meaning that it never
initiates a bus transaction. The basic write protocol is as follows:
Start Bit; 7-bit Device Address (DA); R/W Bit; Slave Clock
Acknowledge (ACK); 8-bit Memory Address (MA); ACK; 8-bit
Data; ACK; 8-bit Data in MA+1 if desired; ACK; 8-bit Data in
MA+2; ACK; and so on, until STOP Bit. The basic serial format
is illustrated in Figure 4 on page 7.
Document Number: 001-53145 Rev. *E
Page 5 of 16
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Switching Waveforms
Figure 8. Output Voltage Swing
CLK#
CLK
VOD1
VOD2
VOD = VOD1 - VOD2
Figure 9. Output Offset Voltage
CLK
CLK#
50
50
VOS
CLK
CLK#
Figure 10. Duty Cycle Timing
TPERIOD
TPW
TDC
=
TPW
TPERIOD
Figure 11. Output Rise and Fall Time
CLK#
80% 80%
20%
CLK
20%
TR TF
Figure 12. RMS Phase Jitter
Phase noise
Noise Power
Phase noise mark
Offset Frequency
f1
f2
RMS Jitter = Area Under the Masked Phase Noise Plot
CY2XF23
Document Number: 001-53145 Rev. *E
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| PDF Descargar | [ Datasheet CY2XF23.PDF ] | |
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