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PDF SI7308DN Data sheet ( Hoja de datos )
| Número de pieza | SI7308DN | |
| Descripción | N-Channel 60-V (D-S) MOSFET | |
| Fabricantes | Vishay Siliconix | |
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N-Channel 60-V (D-S) MOSFET
Si7308DN
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
60 0.058 at VGS = 10 V
0.072 at VGS = 4.5 V
PowerPAK 1212-8
ID (A)a
6
6
Qg (Typ.)
13 nC
FEATURES
• Halogen-free According to IEC 61249-2-21
Available
• TrenchFET® Power MOSFET
• Low Thermal Resistance PowerPAK® Package
with Small Size and Low 1.07 mm Profile
3.30 mm
D
8D
7
D
6
D
5
S
1S
3.30 mm
2
S
3G
4
Bottom View
Ordering Information: Si7308DN-T1-E3 (Lead (Pb)-free)
Si7308DN-T1-GE3 (Lead (Pb)-free and Halogen-free)
APPLICATIONS
• CCFL Inverter
• Class-D Amp
D
G
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
Continuous Drain Current (TJ = 150 °C)
TC = 25 °C
TC = 70 °C
TA = 25 °C
ID
Pulsed Drain Current (10 µs Width)
Continuous Source-Drain Diode Current
Avalanche Current
Single-Pulse Avalanche Energy
TA = 70 °C
TC = 25 °C
TA = 25 °C
L = 0.1 mH
IDM
IS
IAS
EAS
Maximum Power Dissipation
TC = 25 °C
TC = 70 °C
TA = 25 °C
PD
Operating Junction and Storage Temperature Range
TA = 70 °C
TJ, Tstg
Limit
60
± 20
6a
6a
5.4b, c
4.3b, c
20
6a
2.7b, c
11
6.1
19.8
12.7
3.2b, c
2.1b, c
- 55 to 150
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
Steady State
RthJA
RthJC
31
5
39
°C/W
6.3
Notes:
a. Package limited.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under Steady State conditions is 81 °C/W.
Document Number: 73419
S-83051-Rev. B, 29-Dec-08
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TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
16
14
12
10
8
6
4
2
0
25
50 75 100 125
TC - Case Temperature (°C)
Current Derating*
150
25
20
15
10
5
0
0
Si7308DN
Vishay Siliconix
25 50 75 100 125
TC - Case Temperature (°C)
Power Derating
150
100
10
TA =
L · ID
BV - VDD
1
10-6
10-5
10-4
TA - Time In Avalanche (s)
Single Pulse Avalanche Capability
10-3
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 73419
S-83051-Rev. B, 29-Dec-08
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AN822
Vishay Siliconix
105
Spreading Copper (sq. in.)
95
85
75
65
55
0%
45
100 %
50 %
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
Figure 5. Spreading Copper - Si7401DN
130
120 Spreading Copper (sq. in.)
110
100
90
80
50 %
100 %
70
60 0 %
50
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
Figure 6. Spreading Copper - Junction-to-Ambient Performance
CONCLUSIONS
As a derivative of the PowerPAK SO-8, the PowerPAK
1212-8 uses the same packaging technology and has
been shown to have the same level of thermal perfor-
mance while having a footprint that is more than 40 %
smaller than the standard TSSOP-8.
Recommended PowerPAK 1212-8 land patterns are
provided to aid in PC board layout for designs using this
new package.
The PowerPAK 1212-8 combines small size with attrac-
tive thermal characteristics. By minimizing the thermal
rise above the board temperature, PowerPAK simplifies
thermal design considerations, allows the device to run
cooler, keeps rDS(ON) low, and permits the device to
handle more current than a same- or larger-size MOS-
FET die in the standard TSSOP-8 or SO-8 packages.
www.vishay.com
4
Document Number 71681
03-Mar-06
Datasheet pdf - http://www.DataSheet4U.net/
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