PDF CY28RS480-1 Data sheet ( Hoja de datos )

Número de pieza	CY28RS480-1
Descripción	Clock Generator
Fabricantes	Cypress Semiconductor
Logotipo
Hay una vista previa y un enlace de descarga de CY28RS480-1 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas
No Preview Available ! PRELIMINARY CY28RS480-1 Clock Generator for ATI RS480 Chipset Features • Supports AMD CPU • Selectable CPU frequencies • 200-MHz differential CPU clock pairs • 100-MHz differential SRC clocks • 48-MHz USB clock • 33-MHz PCI clock • 66-MHz HyperTransport clock • I2C support with readback capabilities • Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference (EMI) reduction • 3.3V power supply • 56-pin SSOP and TSSOP packages CPU x2 SRC x8 HTT66 x1 PCI x1 REF x3 USB_48 x1 Block Diagram XIN XOUT CPU_STP# CLKREQ[0:1]# XTAL OSC PLL Ref Freq PLL1 Divider Network IREF PD PLL2 SDATA SCLK I2C Logic Pin Configuration VDD_REF REF[0:2] VDD_CPU CPUT[0:2], CPUC[0:2], VDD_SRC SRCT[0:6],SRCC[0:6] VDD_SRCS SRCST[0:1],SRCSC[0:1] VDD_PCI PCI www.DataSheet.co.kr VDD_HTT HTT66 VDD_48 MHz USB_48 XIN XOUT VDD_48 USB_48 VSS_48 CLK_STOP SCLK SDATA NC CLKREQ#0 CLKREQ#1 SRCT5 SRCC5 VDD_SRC VSS_SRC SRCT4 SRCC4 SRCT3 SRCC3 VSS_SRC VDD_SRC SRCT2 SRCC2 SRCT1 SRCC1 VSS_SRC SRCST1 SRCSC1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 56 SSOP/TSSOP VDD_REF VSS_REF REF0 REF1 REF2 VDD_PCI PCI0 VSS_PCI VDD_HTT HTT66 VSS_HTT CPUT0 CPUC0 VDD_CPU VSS_CPU CPUT1 CPUC1 VDDA VSSA IREF VSS_SRC VDD_SRC SRCT0 SRCC0 VDD_SRC1 VSS_SRC1 SRCST0 SRCSC0 Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Document #: 38-07714 Rev. C Revised August 4, 2005 Datasheet pdf - http://www.DataSheet4U.net/ 1 page Byte 2: Control Register 2 Bit @Pup 71 61 51 40 31 20 11 01 Byte 3: Control Register 3 Bit @Pup 71 60 51 40 31 21 11 01 Byte 4: Control Register 4 Bit @Pup 70 60 50 40 30 20 11 01 PRELIMINARY CY28RS480-1 Name CPUT/C SRCT/C USB_48 PCI Reserved Reserved CPU SRC Reserved Reserved Name CLKREQ# Reserved Reserved Reserved Reserved Reserved Reserved HTT66 Name SRC[T/C]5 SRC[T/C]4 SRC[T/C]3 SRC[T/C]2 SRC[T/C]1 SRC[T/C]0 HTT66 Reserved Description Spread Spectrum Selection ‘0’ = -0.35% ‘1’ = -0.50% 48-MHz Output Drive Strength 0 = 1x, 1 = 2x 33-MHz Output Drive Strength 0 = 1x, 1 = 2x Reserved Reserved CPU/SRC Spread Spectrum Enable 0 = Spread off, 1 = Spread on Reserved Reserved Description CLKREQ# drive mode 0 = SRC clocks driven when stopped, 1 = SRC clocks tri-state when stopped Reserved, Set = 0 Reserved, Set = 1 Reserved, Set = 0 Reserved, Set = 1 Reserved, Set = 1 www.DataSheet.co.kr Reserved, Set = 1 HTT66 Output Drive Strength 0 = High drive, 1 = Low drive. Description SRC[T/C]5 CLKREQ0 control 1 = SRC[T/C]5 stoppable by CLKREQ#0 pin 0 = SRC[T/C]5 free running SRC[T/C]4 CLKREQ#0 control 1 = SRC[T/C]4 stoppable by CLKREQ#0 pin 0 = SRC[T/C]4 free running SRC[T/C]3 CLKREQ#0 control 1 = SRC[T/C]3 stoppable by CLKREQ#0 pin 0 = SRC[T/C]3 free running SRC[T/C]2 CLKREQ#0 control 1 = SRC[T/C]2 stoppable by CLKREQ#0 pin 0 = SRC[T/C]2 free running SRC[T/C]1 CLKREQ#0 control 1 = SRC[T/C]1 stoppable by CLKREQ#0 pin 0 = SRC[T/C]1 free running SRC[T/C]0 CLKREQ#0 control 1 = SRC[T/C]1 stoppable by CLKREQ#0 pin 0 = SRC[T/C]1 free running HTT66 Output enable 0 = disabled, 1 = enabled Reserved Document #: 38-07714 Rev. C Page 5 of 16 Datasheet pdf - http://www.DataSheet4U.net/ 5 Page PRELIMINARY AC Electrical Specifications (continued) Parameter Description Condition CPU outputs TR/TF Output Slew Rate Measured @ test load using VOCM +/-400 mV, 0.85 to 1.65 VDIFF TSKEW ∆ VDIFF VCM Differential Voltage Any CPU to CPU Clock Skew Change in VDIFF_DC Magnitude Common Mode Voltage Measured at load single ended Measured at crossing point VOX Measured at load single ended Crossing Voltage (+) Crossing Voltage (-) ∆ VCM TDC TJCYC SRC TDC TPERIOD TPERIODSS TPERIODAbs Change in VCM Duty Cycle Cycle to Cycle Jitter Measured at load single ended Measured at VOX Measured at VOX SRCT and SRCC Duty Cycle Measured at crossing point VOX 100-MHz SRCT and SRCC Period Measured at crossing point VOX 100-MHz SRCT and SRCC Period, SSC Measured at crossing point VOX 100-MHz SRCT and SRCC Absolute Measured at crossing point VOX Period TPERIODSSAbs 100-MHz SRCT and SRCC Absolute Measured at crossing point VOX Period, SSC TSKEW TSKEW Any SRCT/C to SRCT/C Clock Skew Any SRCS clock to Any SRCS clock Skew Measured at crossing point VOX Measured at crossing point VOX TCCJ LACC TR / TF SRCT/C Cycle to Cycle Jitter SRCT/C Long Term Accuracy SRCT and SRCC Rise and Fall Times TRFM Rise/Fall Matching ∆TR Rise TimeVariation ∆TF Fall Time Variation VHIGH Voltage High VLOW Voltage Low VOX Crossing Point Voltage at 0.7V Swing VOVS Maximum Overshoot Voltage VUDS Minimum Undershoot Voltage VRB Ring Back Voltage HTT66 HyperTransport Output F66 Operating Frequency Measured at crossing point VOX www.DataSheet.co.kr Measured at crossing point VOX Measured from VOL = 0.175 to VOH = 0.525V Determined as a fraction of 2(TR – TF)/(TR + TF) Math averages Figure 8 Math averages Figure 8 See Figure 8. Measure SE TDC Duty Cycle Measured at 1.5V TR/TF Slew Rate, Rise Time Measured at 20% and 60% Slew Rate, Fall Time TCCJ Cycle to Cycle jitter Measured at 1.5V TSKEW HTT66 clock to PCI clock Skew Measurement at 1.5V PCI TDC TPERIOD PCI Duty Cycle Spread Disabled PCIF/PCI Period Measurement at 1.5V Measurement at 1.5V CY28RS480-1 Min. Max. Unit 1.6 0.4 – –150 1.05 0.97 –200 45 0 7 V/ns 2.3 V 250 ps 150 mV 1.45 V 1.45 V 200 mV 55 % 200 ps 45 9.997001 9.997001 9.872001 55 10.00300 10.05327 10.12800 % ns ns ns 9.872001 10.17827 ns – 250 ps - 250 ps – 125 ps – 300 ppm 175 700 ps – 20 % – – 660 –150 250 – –0.3 – 125 ps 125 ps 850 mv – mv 550 mV VHIGH + 0.3 V –V 0.2 V 66.67 MHz 45 55 % 0.9 5.4 V/ns 0.9 4.8 – 275 ps – 1200 ps 45 55 % 29.99100 30.00900 ns Document #: 38-07714 Rev. C Page 11 of 16 Datasheet pdf - http://www.DataSheet4U.net/ 11 Page

Páginas	Total 16 Páginas
PDF Descargar	[ Datasheet CY28RS480-1.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
CY28RS480-1	Clock Generator	Cypress Semiconductor

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar