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PDF AK8122 Data sheet ( Hoja de datos )
| Número de pieza | AK8122 | |
| Descripción | Differential Zero Delay Clock Buffer | |
| Fabricantes | AKM | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AK8122 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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ASAHI KASEI EMD CORPORATION
Features
Operational Frequency Range:
160MHz – 400MHz
Output delay:
-30 ±100ps
Low Jitter Performance:
20 ps (Period RMS 190 – 360MHz)
30 ps (cycle – cycle RMS 190 – 360MHz)
70 ps (Half Period RMS 190 – 250MHz)
60 ps (Half Period RMS 250 – 300MHz)
40 ps (Half Period RMS 300 – 360MHz)
Supply Voltage:
1.8 ±0.1V
Operating Temperature Range:
-20 to +85℃ : AK8122E
-40 to +85℃ : AK8122V
Package:
8-pin MSOP(Lead Free)
Differential Zero Delay
Clock Buffer
AK8122
Description
The AK8122 is a high performance differential zero
delay clock buffer IC with Phase Locked Loop
(PLL). Target application is DDR2 SDRAM and
characteristics of these ICs are acceptable to
standards of JEDEC.
Applications
DDR2 SDRAM Clock Buffer
Block Diagram
TSTI
(VSS)
CLKP
CLKN
VSS
BIAS
FBINP
PC L V
F P P C 1/2
C FO
FBINN
TSTO
(VDD)
OUTP
OUTN
VDD
MS0971-E-00
AK8122 Differential Zero Delay Clock Buffer
-1-
Dec-10
http://www.Datasheet4U.com
1 page  
The brand name
of AKEMD’s IC’s
Standards of Jitter
AK8122
Fig.1 Delay (Static Phase Offset + Skew) : Tdly = ΣTdly/N
Fig.2 Period jitter: Tpj = Tcycn – 1/f0
Fig.3 Cycle to cycle jitter: Tc2cj=Tcn-Tcn+1
Fig.4 Half period jitter: Thpj = Thp – 1/2*f0
MS0971-E-00
Fig.5 Input and Output Slew Rate
-5-
Dec-10
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet AK8122.PDF ] | |
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