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Número de pieza | HD74ALVC16834 | |
Descripción | 18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD74ALVC16834 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
No Preview Available ! HD74ALVC16834
18-bit Universal Bus Driver with 3-state Outputs
and Inverted Latch Enable
ADE-205-216D (Z)
5th. Edition
December 1999
Description
The HD74ALVC16834 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation.
Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode
when the latch enable (LE) input is low. The A data is latched if the clock (CLK) input is held at a high or
low logic level. If LE is high, the A data is stored in the latch/flip flop on the low to high transition of the
CLK. When OE is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a
pullup registor; the minimum value of the registor is determined by the current sinking capability of the
driver.
Features
• Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@VCC = 3.0 V)
1 page Logic Diagram
OE
CLK
LE
A1
27
30
28
54
HD74ALVC16834
1D
C1
CLK
3 Y1
To seventeen other channels
5
5 Page HD74ALVC16834
Waveforms – 3
Output
Control
tf
90 %
Vref
10 %
tZL
Waveform - A
Vref
tZH
Waveform - B
Vref
tr
10 %
90 %
Vref
tLZ
Vref1
tHZ
Vref2
VIH
GND
≈VOH1
VOL
VOH
≈VOL1
Notes:
TEST
VIH
Vref
Vref1
Vref2
VOH1
VOL1
Vcc=2.5±0.2V
VCC
Vcc=2.7V,
3.3±0.3V
2.7 V
1/2 VCC
1.5 V
VOL +0.15 V VOL +0.3 V
VOH–0.15 V VOH–0.3 V
VCC 3.0 V
GND
GND
1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.0 ns, tf ≤ 2.0 ns. (VCC = 2.5±0.2 V)
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. (VCC = 2.7 V, 3.3±0.3 V)
2. Waveform–A is for an output with internal conditions such that the output is low except when
disabled by the output control.
3. Waveform–B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The outputs are measured one at a time with one transition per measurement.
11
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet HD74ALVC16834.PDF ] |
Número de pieza | Descripción | Fabricantes |
HD74ALVC16834 | 18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable | Hitachi Semiconductor |
HD74ALVC16835 | 18-bit Universal Bus Driver with 3-state Outputs | Hitachi Semiconductor |
HD74ALVC16836 | 20-bit Universal Bus Driver with 3-state Outputs | Hitachi Semiconductor |
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