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PDF MGA-14516 Data sheet ( Hoja de datos )

Número de pieza MGA-14516
Descripción High Linearity Active Bias Low Noise Amplifier
Fabricantes Avago Technologies 
Logotipo Avago Technologies Logotipo



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No Preview Available ! MGA-14516 Hoja de datos, Descripción, Manual

MGA-14516
High Gain, High Linearity Active Bias Low Noise Amplifier
Data Sheet
Description
Avago Technologies’ MGA-14516 is a two stage, easy-to-
use GaAs MMIC Low Noise Amplifier (LNA) with active
bias. The LNA has low noise with good input return loss
and high linearity achieved through the use of Avago
Technologies’ proprietary 0.5um and 0.25um GaAs En-
hancement-mode pHEMT process. Both LNAs have an
extra feature inside that allows a designer to adjust supply
current. The first stage has an additional feature where the
gain can be adjusted externally without affecting noise
figure. Minimum matching needed for input, output and
the inter-stage between the two LNA.
It is designed for optimum use between 1.4GHz to 2.7GHz.
For optimum performance at lower frequency from
400MHz to 1.5GHz, the MGA-13516 is recommended.
Both MGA-13516 & MGA-14516 share the same package
and pinout.
Pin Configuration and Package Marking
4.0 x 4.0 x 0.85 mm3 16-lead QFN
Pin 12
Pin 11
Pin 10
Pin 9
14516
YYWW
XXXX
Pin 12
Pin 1Pin 11
Pin 2Pin 10
Pin 3Pin 9
Pin 4
Pin 1
Pin 2
Pin 3
Pin 4
Features
Low noise figure
High gain
Good IRL
High linearity performance
High reverse isolation
Externally adjustable supply current
Externally adjustable gain
GaAs E-pHEMT Technology [1]
Low cost QFN package
Excellent uniformity in product specifications
Specifications
 1.95GHz ; Q1 : 5V, 45mA (typ) Q2 : 5V, 110mA
31.7 dB Gain
0.68 dB Noise Figure
13 dB IRL
38 dBm Output IP3
23.5 dBm Output Power at 1dB gain compression
Applications
Low noise amplifier for cellular infrastructure including
GSM, CDMA, W-CDMA, TD-SCDMA and WiMAX.
Other very low noise applications.
W
TOP VIEW
BOTTOM VIEW
BOTTOM VIEW
Note:
1. Enhancement mode technology employs positive Vgs, thereby
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
Pin Description Pin Description
[1]
[12]
[1]1
[2]2
Not Used
Gnd
9 N[1o2t]Used
10 R[1F1o]ut
[2]
[11] [3]3 RFin
11 R[1F0o]ut
Attention: Observe precautions for
handling electrostatic sensitive devices.
[3]
[10] [4]4 RFgnd1
12 N[9o]t Used
[4] [9] 5 Vbias1 13 Vg
6 FB1
14 RFgnd2
ESD Machine Model = 40 V
ESD Human Body Model = 200 V
Refer to Avago Application Note
7 RFout1
15 Vm
A004R: Electrostatic Discharge,
8 RFin2
16 Vbias
Damage and Control.
Notes:
Package marking provides orientation and identification “14516” is the
Product Identification, “YYWW” is the Date Code, “XXXX” is the last 4
digits of the lot number.

1 page




MGA-14516 pdf
MGA-14516 Typical Performance
TA = 25°C, Vdd1=5V, Vdd2=5V, Vbias=5V unless stated otherwise. Measured on demo board in Figure 5 with compo-
nents listed in Table 1.
60 140
50 120
40 100
80
30
60
20
40
10 20
0
-60 -40 -20 0 20 40 60 80 100
Temperature (°C)
Figure 7. Idd1 vs. Temperature
0
-60 -40 -20
0 20 40 60 80 100
Temperature (°C)
Figure 8. Idd2 vs. Temperature
6
5
4
3
2
1
0
-60 -40 -20
0
20 40 60 80 100
Temperature (°C)
Figure 9. Ibias vs. Temperature
36
34
32
30
28
26
24
1.65 1.75 1.85 1.95
Frequency (GHz)
Figure 10. Gain vs. Frequency and Temperature
-40°C
-30°C
25°C
85°C
2.05 2.15
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
1.65 1.75 1.85 1.95
Frequency (GHz)
Figure 11. NF vs. Frequency and Temperature
-40°C
-30°C
25°C
85°C
2.05 2.15


5 Page





MGA-14516 arduino
PCB Land Pattern and Stencil Design
0.650
0.650
0.300 0.270
2.200
0.650
2.200 0.350
PCB Land Pattern (Top View)
0.485
0.650
0.300
0.270
2.200
1.980
2.200
1.980
0.485
Combines PCB & Stencil Layouts
All Dimension are in MM
1.980
1.980
Stencil Outline
0.492
11

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