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PDF SY7088 Data sheet ( Hoja de datos )
| Número de pieza | SY7088 | |
| Descripción | 2.3V Minimum Input and 5.5V Maximum Output 3A Peak Current Synchronous Boost | |
| Fabricantes | Silergy | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SY7088 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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昱灿电子 www.szyucan.com
Application Note: SY7088
2.3V Minimum Input and 5.5V Maximum Output
3A Peak Current Synchronous Boost with Output Disconnect
Preliminary Specification
General Description
SY7088 is a high efficiency synchronous boost
regulator that converts up to 5.5V output voltage. It
adopts NMOS for the main switch and PMOS for the
synchronous switch. It can disconnect the output from
input during the shutdown mode.
Ordering Information
SY7088 □(□□)□
Tempera ture Code
Packa ge Code
Optiona l Spec Code
Ordering Number Package type
SY7088DGC
DFN2x3-8
Note
----
Features
• 2.3-5.0V input voltage range
• Adjustable output voltage from 2.5V to 5.5V
• Pseudo-constant frequency: 1MHz
• 3A peak current limit
• Input under voltage lockout
• Load disconnect during shutdown
• Output over voltage protection
• Low RDS(ON) (main switch/synchronous switch)
at 5.0V output: 70/100mohm
• Compact package: DFN2x3-8
Applications
• All Single Cell Li or Dual Cell Battery Operated
Products as MP-3 Player, PDAs, and Other
Portable Equipment.
Typical Applications
Figure 1. Schematic Diagram
Figure 2. Efficiency Figure
AN_SY7088 Rev.0.1A
1
1 page  
昱灿电子 www.szyucan.com
SY7088
Applications Information
Because of the high integration for SY7088, only input
capacitor CIN, output capacitor COUT, inductor L and
feedback resistors (R1 and R2) need to be selected for
the targeted applications specifications.
Feedback resistor dividers R1 and R2:
Choose R1 and R2 to program the proper output voltage.
To minimize the power consumption under light loads,
it is desirable to choose large resistance values for both
R1 and R2. A value of between 10kΩ and 1MΩ is
recommended for both resistors. If VOUT is 5.0V,
R1=470kΩ is chosen, using following equation, then R2
can be calculated to be 148.4kΩ:
R2
=
1.2V
VOUT −1.2V
R1
1.2VFB
GND
VOUT
R1
R2
Input capacitor CIN:
The ripple current through input capacitor is calculated
as:
ICIN_RMS
=
VIN ⋅ (VOUT − VIN )
2 3 ⋅ L ⋅ FSW ⋅ VOUT
To minimize the potential noise problem, place a
typical X5R or better grade ceramic capacitor really
close to the IN and GND pins. Care should be taken to
minimize the loop area formed by CIN, and IN/GND
pins. In this case, a 22uF low ESR ceramic capacitor is
recommended.
Output capacitor COUT:
The output capacitor is selected to handle the output
ripple noise requirements. Both steady state ripple and
transient requirements must be taken into consideration
when selecting this capacitor. For the best performance,
it is recommended to use X5R or better grade ceramic
capacitor with 10V rating and greater than 22uF
capacitance.
Output inductor L:
There are several considerations in choosing this
inductor.
1) Choose the inductance to provide the desired
ripple current. It is suggested to choose the ripple
current to be about 40% of the maximum output
current. The inductance is calculated as:
L = ( VIN )2
(VOUT − VIN )
VOUT FSW × IOUT,MAX × 40%
where FSW is the switching frequency and IOUT,MAX is
the maximum load current.
The SY7088 regulator IC is quite tolerant of different
ripple current amplitude. Consequently, the final choice
of inductance can be slightly off the calculation value
without significantly impacting the performance.
2) The saturation current rating of the inductor must
be selected to be greater than the peak inductor
current under full load conditions.
ISAT,MIN
>
VOUT
VIN
× IOUT, MAX +
VIN
VOUT
(VOUT − VIN )
2 × FSW × L
3) The DCR of the inductor and the core loss at the
switching frequency must be low enough to
achieve the desired efficiency requirement. It is
desirable to choose an inductor with
DCR<50mohm to achieve a good overall
efficiency.
Enable Operation
Pulling the EN pin low (<0.4V) will shut down the
device. During shutdown mode, the SY7088 shutdown
current drops to lower than 1uA, Driving the EN pin
high (> 1.2V) will turn on the IC again.
Layout Design:
To achieve a higher efficiency and better noise
immunity, following components should be placed
close to the IC: CSIN, COUT, L, RH and RL.
1) It is desirable to maximize the PCB copper area
connecting to GND pin to achieve the best thermal and
noise performance. If the board space allowed, a
ground plane is highly desirable. PGND and SGND
pins are recommended to connect to exposed paddle
directly. Reasonable via holes are recommended to be
placed under the exposed paddle for the better
performance consideration.
AN_SY7088 Rev.0.1A
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SY7088.PDF ] | |
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