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PDF RT9173B Data sheet ( Hoja de datos )
| Número de pieza | RT9173B | |
| Descripción | 2A Bus Termination Regulator | |
| Fabricantes | Richtek | |
| Logotipo |  |
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RT9173B
2A Bus Termination Regulator
General Description
The RT9173B regulator is designed to convert voltage
supplies ranging from 1.7V to 6V into a desired output
voltage of which adjusted by two external voltage divider
resistors. The regulator is capable of sourcing or sinking
up to 2A of current while regulating an output voltage to
within 40mV.
The RT9173B, used in conjunction with series termination
resistors, provides an excellent voltage source for active
termination schemes of high speed transmission lines as
those seen in high speed memory buses and distributed
backplane designs. The voltage output of the regulator can
be used as a termination voltage for DDR SDRAM.
Current limits in both sourcing and sinking mode, plus on-
chip thermal shutdown make the circuit tolerant of the
output fault conditions.
The RT9173B are available in the popular 5-lead TO-252
and fused SOP-8 (the multiple VCNTL pins on the SOP-8
package are internally connected but lowest thermal
resistance) surface mount packages.
Ordering Information
RT9173B
Package Type
S : SOP-8
L5 : TO-252-5
Note :
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Features
z Support Both DDR I (1.25VTT) and DDR II (0.9VTT)
Requirements
z SOP-8 and TO-252-5 Packages
z Capable of Sourcing and Sinking Current
z Current-limiting Protection
z Thermal Protection
z Integrated Power MOSFETs
z Generates Termination Voltages for SSTL-2
z High Accuracy Output Voltage at Full-Load
z Adjustable VOUT by External Resistors
z Minimum External Components
z Shutdown for Standby or Suspend Mode Operation
with High-impedance Output
z RoHS Compliant and 100% Lead (Pb)-Free
Applications
z DDR Memory Termination Supply
z Active Termination Buses
z Desktop PC/AGP Graphics
z Set Top Box/IPC
z Supply Splitter
Pin Configurations
(TOP VIEW)
VIN
GND
REFEN
VOUT
8
27
36
45
SOP-8
VCNTL
VCNTL
VCNTL
VCNTL
5
4
3
2
1
TO-252-5
VOUT
REFEN
VCNTL (TAB)
GND
VIN
DS9173B-10 April 2011
www.richtek.com
1
1 page  
RT9173B
Absolute Maximum Ratings (Note 1)
z Input Voltage ---------------------------------------------------------------------------------------------------------- 7V
z Power Dissipation, PD @ TA = 25°C
SOP-8 ------------------------------------------------------------------------------------------------------------------ 0.625W
TO-252 ----------------------------------------------------------------------------------------------------------------- 1.471W
z Package Thermal Resistance (Note 2)
SOP-8, θJA ------------------------------------------------------------------------------------------------------------ 160°C/W
SOP-8, θJC ------------------------------------------------------------------------------------------------------------ 23°C/W
TO-252, θJA ------------------------------------------------------------------------------------------------------------ 68°C/W
TO-252, θJC ----------------------------------------------------------------------------------------------------------- 8°C/W
z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C
z Junction Temperature ----------------------------------------------------------------------------------------------- 150°C
z Storage Temperature Range --------------------------------------------------------------------------------------- –65°C to 150°C
z ESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 4)
z Junction Temperature Range -------------------------------------------------------------------------------------- –40°C to 125°C
Electrical Characteristics
(VIN = 2.5V, VCNTL = 3.3V, VREFEN = 1.25V, COUT = 10μF (Ceramic), TA = 25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Output Offset Voltage
Load Regulation
Input Voltage Range (DDR I/II)
Operating Current of VCNTL
Current In Shutdown Mode
Short Circuit Protection
VOS IOUT = 0A, Figure 1 (Note 5)
−20 0
20
ΔVLOAD
IL : 0A → 2A, Figure 1
IL : 0A → -2A
−20 0
20
VIN Keep VCNTL ≥ VIN on operation power 1.7 2.5/1.8 --
VCNTL on and power off sequences
3 3.3/5 6
ICNTL No Load
-- 1 2.5
ISHDN VREFEN < 0.2V, RL = 180Ω, Figure 2
--
50 90
mV
mV
V
mA
μA
Current limit
ILIM
Over Temperature Protection
Figure 3,4
2.2 2.6 --
A
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Shutdown Function
TSD
ΔTSD
3.3V ≤ VCNTL ≤ 5V
3.3V ≤ VCNTL ≤ 5V
125 170 -- °C
-- 35 -- °C
Shutdown Threshold Trigger
Output = High, Figure 5
Output = Low, Figure 5
0.6 --
--
V
-- -- 0.2
DS9173B-10 April 2011
www.richtek.com
5
5 Page 
RT9173B
Input Capacitor and Layout Consideration
Place the input bypass capacitor as close as possible to
the RT9173B. A low ESR capacitor larger than 470uF is
recommended for the input capacitor. Use short and wide
traces to minimize parasitic resistance and inductance.
Inappropriate layout may result in large parasitic inductance
and cause undesired oscillation between RT9173B and
the preceding power converter.
Thermal Consideration
An internal thermal limiting circuitry shuts down the
RT9173B when junction temperature is over 170°C. This
protects the device during overload conditions. It is noted
that the thermal limiting circuitry is not intended for normal
operation. For maximum reliability, the junction temperature
should not exceed absolute maximum operation
temperature 125°C during normal operation. The power
dissipation should be well considered to keep the junction
temperature within the specification.
The power dissipation in RT9173B is calculated as:
PD = (VIN − VOUT) x IOUT + VIN x IQ
The maximum power dissipation can be calculated by
following formula:
PD(MAX) = ( TJ(MAX) -TA ) /θJA
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and the
θJA is the junction to ambient thermal resistance.
The junction to ambient thermal resistance θJA highly
depends on IC package, PCB layout , the rate of
surroundings airflow. θJA for SOP-8 package is 160°C/W
and TO-252 package is 68°C/W on standard JEDEC 51-3
(single layer, 1S) thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula:
PD(MAX) = (125 − 25°C) / 160 = 0.625W (SOP-8)
PD(MAX) = (125 − 25°C) / 68 = 1.471W (TO-252)
Since the multiple VCTRL pins of the SOP-8 package are
internally shorted and connected to lead frame, it is efficient
to dissipate the heat by adding cooper area on VCTRL
footprint. Figure 7 shows the relation about thermal
resistance θJA vs. copper area on a standard JEDEC 51-7
(4 layer, 2S2P) thermal test board at TA = 25°C. The
corresponding maximum power dissipation is shown in
Figure 8. For example, with 10mm x 10mm cooper area,
we can obtain the lower thermal resistance about 45°C/W.
The power maximum dissipation can be calculated as:
PD(MAX) = (125 − 25°C) / 45 = 2.22W (SOP-8)
θJA vs. Copper Area
100
90
80
70
60
50
40
30
0
10 20
SOP-8
30 40 50 60 70 80 90 100
Copper Area (mm2)
Figure 7
Power Dissipation vs. Copper Area
100 TJ = 125°C
90
80
70 TA = 65°C
60 TA = 55°C
50
TA = 25°C
40
30
20
10
0
0
SOP-8
0.5 1 1.5 2 2.5
Power Dissipation (W)
3
Figure 8
DS9173B-10 April 2011
www.richtek.com
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet RT9173B.PDF ] | |
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